參數(shù)資料
型號(hào)： AK4184
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： TSC with Keypad Scanner and GPIO Expander
中文描述： 臺(tái)糖與鍵盤掃描儀和GPIO擴(kuò)展
文件頁(yè)數(shù)： 26/36頁(yè)
文件大?。?/td> 597K
代理商： AK4184
[AK4184]
MS0603-E-00
2007/04
26
■
GPIO controller
The AK4184 has eight ports [GP0:GP7] which can be configured as inputs or outputs for general purpose. Figure 14
shows a block diagram of a single GPIO pin. The GPIO Pin Direction register (GPDR) is used to program the GPIO
pins as input or output. For a pin configured as output, use the GPIO pin pull-up register (GPPU) to set the pin type to
either Open-Drain or CMOS, and use the GPIO Set/Clear register (GPSCR) to set a pin level high or low.
To validate the state of GP0 ~GP7 pins, write to the GPIO pin state register (GPSR) to program the pin state as pull-
down or Hi-Z and read the GPIO Pin Level register (GPLR) at any time even if the pin is configured as an output. The
GPIO pin state is determined by these registers before writing and reading the pin level.
The pin state set by default input, pull-down.
Pin Set
(GPSCR)
Pin Level
(GPLR)
Pin Pull-up
(GPPU)
Pin Direction
(GPDR)
GPIO Pin
Pin State
(GPSR)
Figure 14. General-Purpose I/O Block Diagram
■
GPIO Pin Set/Clear Register (PAGE 1)
The GPIO pin set/clear register sets the pin level when the pin is configured as an output (Table 28: IO bit = “1”).
GPSCR is a write-only register. The actual pin level is read from the GPLR register.
Addr
Name
D15 D14
D13 D12 D11
D10
10H
GPSCR
0
0
0
0
0
0
Table 25. GPIO Pin Set/Clear Register Format
D9
0
D8
0
D7
SC7
D6
SC6
D5
SC5
D4
SC4 SC3 SC2 SC1
D3
D2
D1
D0
SC0
Bits
15:8
7:0
Name
Description
Reserved
Set GPIO Pin level for GPIO pins
0 = Set pin level low (default)
1 = Set pin level high
Table 26. GPIO Pin Set/Clear Register
SC
■
GPIO Pin Direction Register (PAGE 1 )
Whether a pin is input or an output is determined by the GPDR register. The GPDR contains one direction-control bit
for each of the eight GPIO pins.
Addr
Name
D15
D14
D13 D12
D11
D10
11H
GPDR
IO7
IO6
IO5
IO4
IO3
IO2
Table 27. GPIO Pin Direction Register Format
Bits
Name
15:8
IO
GPIO Direction select
0 = GPIO pin configured as input. (default)
1 = GPIO pin configured as output.
7:0
Reserved
Table 28. GPIO Direction Register
D9
IO1
D8
IO0
D7
0
D6
0
D5
0
D4
0
D3
0
D2
0
D1
0
D0
0
Description
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