參數(shù)資料
型號: AK4125VF
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 192kHz / 24Bit High Performance Asynchronous SRC
中文描述: 192kHz的/ 24位高性能異步鋼骨混凝土
文件頁數(shù): 9/26頁
文件大小: 393K
代理商: AK4125VF
[AK4125]
MS0379-E-04
2007/07
- 9 -
SWITCHING CHARACTERISTICS
(Ta=25
°
C; AVDD, DVDD=3.0
3.6V; C
L
=20pF)
Parameter
Master Clock Timing
Frequency
Pulse Width Low
Pulse Width High
LRCK for Input data (ILRCK)
Frequency
Duty Cycle Slave Mode
Master Mode
LRCK for Output data (OLRCK)
Frequency
Duty Cycle Slave Mode
Master Mode
Symbol
fCLK
tCLKL
tCLKH
fs
Duty
Duty
fs
Duty
Duty
tBCK
tBCK
tBCKL
tBCKH
tLRB
tBLR
tSDH
tSDS
fBCK
dBCK
tMBLR
tSDH
tSDS
tBCK
tBCK
tBCKL
tBCKH
tLRB
tBLR
tLRS
tBSD
fBCK
dBCK
tMBLR
tBSD
tPD
min
1.024
0.4/fCLK
0.4/fCLK
8
48
8
48
1/128fs
1/64fs
27
27
15
15
15
15
20
15
15
1/128fs
1/64fs
27
27
20
20
20
20
150
typ
50
50
50
50
max
41.472
216
52
216
52
Units
MHz
ns
ns
kHz
%
%
kHz
%
%
ns
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
Audio Interface Timing
Input PORT (Slave mode)
IBICK Period (8kHz
108kHz)
(108kHz
216kHz)
IBICK Pulse Width Low
Pulse Width High
ILRCK Edge to IBICK “
” (Note 7)
IBICK “
” to ILRCK Edge (Note 7)
SDTI Hold Time from IBICK “
SDTI Setup Time to IBICK “
Input PORT (Master mode)
IBICK Frequency
IBICK Duty
IBICK “
” to ILRCK
SDTI Hold Time from IBICK “
SDTI Setup Time to IBICK “
Output PORT (Slave mode)
OBICK Period (8kHz
108kHz)
(108kHz
216kHz)
OBICK Pulse Width Low
Pulse Width High
OLRCK Edge to OBICK “
” (Note 7)
OBICK “
” to OLRCK Edge (Note 7)
OLRCK to SDTO (MSB) (Except I
2
S mode)
OBICK “
” to SDTO
Output PORT (Master mode)
OBICK Frequency
OBICK Duty
OBICK “
” to OLRCK
OBICK “
” to SDTO
Reset Timing
PDN Pulse Width (Note 8)
Note 7. BICK rising edge must not occur at the same time as LRCK edge.
Note 8. The AK4125 can be reset by bringing the PDN pin = “L”.
64fs
50
20
20
20
20
20
64fs
50
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參數(shù)描述
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