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參數(shù)資料
| 型號(hào)： | AK4113VF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192KHZ 24BIT DIR WITH 6:1 SELECTOR |
| 中文描述： | 192kHz 24位處長(zhǎng)與6:1選擇器 |
| 文件頁(yè)數(shù)： | 20/49頁(yè) |
| 文件大?。?/td> | 531K |
| 代理商： | AK4113VF |
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ASAHI KASEI
[AK4113]
MS0349-E-01
2005/03
- 20 -
System Reset and Power-Down
The AK4113 has a power-down mode for all circuits using the PDN pin or it can be partially powerd-down with the
PWN bit. The RSTN bit initializes the register and resets the internal timing. In parallel control mode, only control by the
PDN pin is enabled. The AK4113 should be reset once by bringing PDN pin = “L” upon power-up.
PDN Pin:
All analog and digital circuits are placed in power-down and reset mode by bringing PDN pin = “L”. All the
registers are initialized, and clocks are stopped. Reading/Witting to the registers are disabled.
RSTN Bit (Address 00H; D0):
All the registers except PWN and RSTN bits are initialized by bringing RSTN bit = “0”. The internal timings
is also initialized. Writing to registers is not available except the PWN and RSTN bits. Reading from the
registers is disabled.
PWN Bit (Address 00H; D1):
The clock recovery is initialized by bringing PWN bit = “0”. In this case, the clocks are stopped. The registers
are not initialized and the mode settings are maintained. Writing and reading to the registers are enabled.
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