參數(shù)資料
型號: AK2540
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Quad T1 Transceiver
中文描述: 的4 T1收發(fā)器
文件頁數(shù): 8/33頁
文件大?。?/td> 159K
代理商: AK2540
ASAHI K ASEI [AK2540]
MS0012-E-00 2000/1
8
Pin Name
I/O
Function
Comments
Common block (Cont.)
CS
I
Chip Select input pin
Note2)
BTS
I
Bus Type Select input pin
BTS=”H” : Motorola Mode
BTS=”L” : Intel Mode
Note2)
AD0-AD7
I/O
Address/Data Input/Output pins
Used for read/write internal registers.
Note2)
MCLKSEL
I
MCLK Select input pin
CLKSEL=”H”:1.544MHz
CLKSEL=”L”:24.704MHz
HWMODE
I
Hardware/ Host Mode Select input pin
HWMODE=”H”: Hardware Mode
HWMODE=”L”: Host Mode
SEL5V
I
5.0V /3.3V VDD Select input pin
SEL5V=”H”: 5V operation
SEL5V=”L”: 3.3V operation
CLK E
I
RCLK clock edge select input pin
RESET
I
Reset Input pin
Active “High” input pulse over 200ns initializes the internal circuit
and forces RPOSx/RNEGx output “l(fā)ow” and LOSx output “high”.
TEST1 - 8
I
Factory Use. Should be connected to “VSS” externally.
TAVDD1,2
Positive Power Supply for the analog circuitry in the transmitters
TAVSS1,2
Negative Power Supply for the analog circuitry in the transmitters
RAVDD
Positive Power Supply for the digital circuitry in the transmitters
RAVSS
Negative Power Supply for the digital circuitry in the transmitters
DVDD
Positive Power Supply for Digital
DVSS
Negative Power Supply for Digital
DAVSS1,2
Ground for Digital
IOVDD
Positive Power Supply for I/O
IOVSS
Negative Power Supply for I/O
BVDD
Positive Power Supply for Reference Circuit
BVSS
Negative Power Supply for Reference Circuit
PVDD
Positive Power Supply for PLL
PVSS
Negative Power Supply for PLL
BGREF
Bandgap Reference Output pin
12k
±
1% external register should be connected across this pin and
VSS.
Note1) Hardware Mode
Note2) Host Mode
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