參數(shù)資料
型號(hào)： AHA4013B
廠商： Electronic Theatre Controls, Inc.
英文描述： 12.5 MBytes/sec Reed-Solomon Error Correction Device
中文描述： 12.5 MB /秒的Reed - Solomon糾錯(cuò)裝置
文件頁(yè)數(shù)： 14/28頁(yè)
文件大小： 232K
代理商： AHA4013B
Page 10 of 24
PS4013B-0600
Advanced Hardware Architectures, Inc.
Data of one block must be fully emptied L
×
C
o
clocks after the start of empty process.
All of the conditions on the maximum delay given in Equation 4 must be satisfied. If any are not, the
output data stream will begin to inhibit ECC processing. Eventually this will cause the input buffer to over
fill and RDYIN to become inactive.
Figure 4:
Burst and Continuous Operations
(Note: Blocks are shown from right to left as they are input into and output from the chip in Forward Order.
Block
i
is the first input block, block
i + 1
is second input block. X
K
1
is the first input message byte of a block. Y
o
is the last input check symbol of a block. Notes 1 and 2 in burst operation are described in Section 2.9.1 Burst
Operation - Caveats.)
For a 50 MHz system using the required clocks per byte, maximum latencies and data rates for forward
order output are shown in the table for continuous operation. Input and Output rates are assumed the same
in this table. Note: Other frequency operations are also possible.
Table 3:
Continuous Operation Using 50 MHz Clock and Specified Clocks/Byte, Forward
OutputOrder
For Intelsat IESS-308, Rev F, Inner FEC Rates, use Table 4 for a system with 50 MHz clock.
Note: Other frequency operations are also possible.
CHECK BYTES
‘
R
’
= 20
MINIMUM
REQUIRED
(clocks/byte)
(MBytes/sec)
6
5
4
4
4
4
4
CHECK BYTES
‘
R
’
= 2
MINIMUM
REQUIRED
(clocks/byte)
(MBytes/sec)
5
5
4
4
4
4
4
BLOCK
LENGTHS
‘
N
’
MAXIMUM
DATA RATE
MAXIMUM
LATENCY
(
μ
secs)
5.08
7.75
12.18
17.52
22.86
25.52
28.72
MAXIMUM
DATA RATE
MAXIMUM
LATENCY
(
μ
secs)
4.26
7.39
11.82
17.16
22.50
25.16
28.36
25
50
100
150
200
225
255
8.34
10.00
12.50
12.50
12.50
12.50
12.50
10.0
10.0
12.5
12.5
12.5
12.5
12.5
Input Data:
Output Data:
Block i+3
. . . . . . . . . .
Block i+2
. . . . . . . . . .
Block i+1
. . . . . . . . . .
Block i
. . . . . . . . . .
Y
0
Y
0
Y
0
Y
0
Block i+3
. . . . . . . . . .
Block i+2
. . . . . . . . . .
Block i+1
. . . . . . . . . .
Block i
. . . . . . . . . .
Y
0
Y
0
Y
0
Y
0
K-1
X
K-1
X
K-1
X
K-1
X
K-1
X
K-1
X
K-1
X
K-1
X
Burst Operation
Continuous Operation
Block i
Block i+1
. . . . . . . . . .
Input Data:
Output Data:
Processing Latency
Block i+1
. . . . . . . . . .
Block i
. . . . . . . . . . . . . . . . . .
. . . . . . . . . .
Y
0
Y
0
Y
0
K-1
X
Y
0
K-1
X
K-1
X
K-1
X
2
1
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