參數(shù)資料
型號: AGLE3000V2-FFG484C
元件分類: FPGA
英文描述: FPGA, 75264 CLBS, 3000000 GATES, PBGA484
封裝: 23 X 23 MM, 2.23 MM HEIGHT, 1 MM PITCH, FBGA-484
文件頁數(shù): 128/156頁
文件大?。?/td> 5023K
代理商: AGLE3000V2-FFG484C
IGLOOe DC and Switching Characteristics
Ad vance v0.3
2-59
SSTL3 Class I
Stub-Speed Terminated Logic for 3.3 V memory bus standard (JESD8-8). IGLOOe devices support
Class I. This provides a differential amplifier input buffer and a push-pull output buffer.
Table 2-97 Minimum and Maximum DC Input and Output Levels
SSTL3 Class I
VIL
VIH
VOL
VOH
IOL IOH
IOSH
IOSL
IIL IIH
Drive Strength Min., V Max., V
Min., V Max., V Max., V Min., V mA mA Max., mA1 Max., mA1 A2 A2
14 mA
–0.3
VREF – 0.2 VREF + 0.2
3.6
0.7
VCCI – 1.1 14 14
54
51
10 10
Notes:
1. Currents are measured at 100°C junction temperature and maximum voltage.
2. Currents are measured at 85°C junction temperature.
Figure 2-21 AC Loading
Table 2-98 AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring
Point* (V)
VREF (typ.) (V)
VTT (typ.) (V)
CLOAD (pF)
VREF – 0.2
VREF + 0.2
1.5
1.485
30
* Measuring point = Vtrip. See Table 2-22 on page 2-22 for a complete table of trip points.
Test Point
30 pF
50
25
SSTL3
Class I
VTT
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