Revision 4 5-13 Advance v0.8 (continued) The voltage range in the &quo" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� AFS250-PQ208
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 256/334闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 2MB FLASH 250K 208PQFP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 24
绯诲垪锛� Fusion®
RAM 浣嶇附瑷�(j矛)锛� 36864
杓稿叆/杓稿嚭鏁�(sh霉)锛� 93
闁€鏁�(sh霉)锛� 250000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 85°C
灏佽/澶栨锛� 208-BFQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 208-PQFP锛�28x28锛�
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Fusion Family of Mixed Signal FPGAs
Revision 4
5-13
Advance v0.8
(continued)
The voltage range in the "VPUMP Programming Supply Voltage" section was
updated. The parenthetical reference to "pulled up" was removed from the
statement, "VPUMP
can be left floating or can be tied (pulled up) to any voltage
between 0 V and 3.6 V."
2-225
The "ATRTNx Temperature Monitor Return" section was updated with information
about grounding and floating the pin.
2-226
The following text was deleted from the "VREF I/O Voltage Reference" section: (all
digital I/O).
2-225
The "NCAP Negative Capacitor" section and "PCAP Positive Capacitor" section
were updated to include information about the type of capacitor that is required to
connect the two.
2-228
1 F was changed to 100 pF in the "XTAL1 Crystal Oscillator Circuit Input".
2-228
The "Programming" section was updated to include information about VCCOSC.
2-229
The VMV pins have now been tied internally with the VCCI pins.
N/A
The AFS090"108-Pin QFN" table was updated.
3-2
The AFS090 and AFS250 devices were updated in the "108-Pin QFN" table.
3-2
The AFS250 device was updated in the "208-Pin PQFP" table.
3-8
The AFS600 device was updated in the "208-Pin PQFP" table.
3-8
The AFS090, AFS250, AFS600, and AFS1500 devices were updated in the "256-Pin
FBGA" table.
3-12
The AFS600 and AFS1500 devices were updated in the "484-Pin FBGA" table.
3-20
Advance v0.7
(January 2007)
The AFS600 device was updated in the "676-Pin FBGA" table.
3-28
The AFS1500 digital I/O count was updated in the "Fusion Family" table.
I
The AFS1500 digital I/O count was updated in the "Package I/Os: Single-/Double-
Ended (Analog)" table.
II
Advance v0.6
(October 2006)
The second paragraph of the "PLL Macro" section was updated to include
information about POWERDOWN.
2-30
The description for bit 0 was updated in Table 2-17 RTC Control/Status Register.
2-38
3.9 was changed to 7.8 in the "Crystal Oscillator (Xtal Osc)" section.
2-40.
All function descriptions in Table 2-18 Signals for VRPSM Macro.
2-42
In Table 2-19 Flash Memory Block Pin Names, the RD[31:0] description was
updated.
2-43
The "RESET" section was updated.
2-61
The "RESET" section was updated.
2-64
Table 2-35 FIFO was updated.
2-79
The VAREF function description was updated in Table 2-36 Analog Block Pin
Description.
2-82
The "Voltage Monitor" section was updated to include information about low power
mode and sleep mode.
2-86
The text in the "Current Monitor" section was changed from 2 mV to 1 mV.
2-90
The "Gate Driver" section was updated to include information about forcing 1 V on
the drain.
2-94
Revision
Changes
Page
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
ACC50DRES CONN EDGECARD 100PS .100 EYELET
ABC50DRES CONN EDGECARD 100PS .100 EYELET
AFS250-PQG208 IC FPGA 2MB FLASH 250K 208PQFP
GCB75DHBT CONN EDGECARD 150PS R/A .050 SLD
M1AFS250-PQ208 IC FPGA 2MB FLASH 250K 208-PQFP
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
AFS250-PQ208I 鍔熻兘鎻忚堪:IC FPGA 2MB FLASH 250K 208PQFP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Fusion® 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FPBGA锛�27X27锛�
AFS250-PQ208X3 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:FUSION 250K GATES COMM CMOS 3.3V 208 QFP - Trays 鍒堕€犲晢:Microsemi SOC Products Group 鍔熻兘鎻忚堪:FUSION 250K GATES COMM CMOS 3.3V 208 QFP - Trays
AFS250-PQ256ES 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:Actel Fusion Mixed-Signal FPGAs
AFS250-PQ256I 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:Actel Fusion Mixed-Signal FPGAs
AFS250-PQ256PP 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:Actel Fusion Mixed-Signal FPGAs