參數(shù)資料
型號: AFE031AIRGZR
廠商: Texas Instruments
文件頁數(shù): 33/57頁
文件大?。?/td> 0K
描述: IC AFE POWERLINE COMM 48VQFN
標準包裝: 2,500
位數(shù): 10
通道數(shù): 1
電壓 - 電源,模擬: 3 V ~ 3.6 V
電壓 - 電源,數(shù)字: 3 V ~ 3.6 V
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-VQFN 裸露焊盤(7x7)
包裝: 帶卷 (TR)
SBOS531D – AUGUST 2010 – REVISED MAY 2012
POWER SUPPLIES
The AFE031 has two low-voltage analog power-supply pins and one low-voltage digital supply pin. Internally, the
two analog supply pins are connected to each other through back-to-back electrostatic discharge (ESD)
protection diodes. These pins must be connected to each other on the application printed circuit board (PCB). It
is also recommended to connect the digital supply pin and the two analog supply pins together on the PCB. Both
low-voltage analog ground pins are also connected internally through back-to-back ESD protection diodes. These
ground pins should also be connected to the digital ground pin on the PCB. It is recommended to bypass the
low-voltage power supplies with a parallel combination of a 10-
μf and 100-nf capacitor. The PA block is biased
separately from a high-voltage, high-current supply.
Two PA power supply pins and two PA ground pins are available to provide a path for the high currents
associated with driving the low impedance of the ac mains. Connecting the two PA supply pins together is
recommended. It is also recommended to place a bypass capacitor of 47
μF to 100 μF in parellel with 100 nF as
close as possible to the AFE031. Care must be taken when routing the high current ground lines on the PCB to
avoid creating voltage drops in the PCB ground that may vary with changes in load current.
The AFE031 has many options to enable or disable the functional blocks to allow for flexible power-savings
modes. Table 17 shows the specific power supply that each functional block draws power from, as well as the
typical amount of power drawn from the associated power supplies for both the enabled and disabled states. For
additional information on power-supply requirements refer to Application Report SBOA130, Analog Front-End
Design for a Narrowband Power-Line Communications Modem Using the AFE031 (available for download at
Table 17. Power Consumption with Enable and Disable Times (Typical)
AVDD SUPPLY
DVDD SUPPLY
PA SUPPLY
BLOCK
STATUS
ENABLE TIME
DISABLE TIME
CURRENT
On
10
μs
61 mA
PA
Off
10
μs
70
μA
On
10
μs
3.7 mA
Tx
Off
10
μs
1
μA
On
10
μs
5.3 mA
Rx
Off
10
μs
1
μA
On
10
μs
900
μA
ERx
Off
10
μs
1
μA
On
10
μs
1.2 mA
ETx
Off
10
μs
1
μA
On
10
μs
16
μA
DAC
Off
10
μs
1
μA
On
10
μs
25
μA
ZC
Off
10
μs
1
μA
On
10
μs
26
μA
REF1
Off
10
μs
8
μA
On
10
μs
25
μA
REF2
Off
10
μs
4
μA
Copyright 2010–2012, Texas Instruments Incorporated
39
Product Folder Link(s): AFE031
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