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ADXL05
–9–
REV. B
T HE ORY OF OPE RAT ION
T he ADX L05 is a complete acceleration measurement system
on a single monolithic IC. It contains a polysilicon surface-
micro machined sensor and signal conditioning circuitry which
implements a force-balance control loop. T he ADX L05 is ca-
pable of measuring both positive and negative acceleration to a
maximum level of
±
5
g
.
Figure 16 is a simplified view of the ADX L05’s acceleration
sensor at rest. T he actual structure of the sensor consists of 46
unit cells and a common beam. T he differential capacitor sensor
consists of independent fixed plates and central plates attached
to the main beam that moves in response to an applied accelera-
tion. T he two capacitors are series connected, forming a
capacitive divider with a common movable central plate. T he
sensor’s fixed capacitor plates are driven differentially by a
1 MHz square wave: the two square wave amplitudes are equal
but are 180
°
out of phase from one another. When at rest, the
values of the two capacitors are the same, and therefore, the
voltage output at their electrical center (i.e., at the center plate)
is zero.
CS1
CS2
BEAM
FIXED
OUTER
PLATES
UNIT CELL
CS1 = CS2
DENOTES ANCHOR
CENTER PLATE
Figure 16. A Simplified Diagram of the ADXL05
Sensor at Rest
Figure 17 shows the sensor responding to an applied accelera-
tion. When this occurs, the common central plate or “beam”
moves closer to one of the fixed plates while moving further
from the other. T his creates a mismatch in the two capacitances,
resulting in an output signal at the central plate. T he output
amplitude of the signal varies directly with the amount of accel-
eration experienced by the sensor.
BEAM
FIXED
OUTER
PLATES
UNIT CELL
CS1
<
CS2
TOP VIEW
APPLIED
ACCELERATION
CS1
CS2
DENOTES ANCHOR
CENTER PLATE
Figure 17. The ADXL05 Sensor Momentarily Responding
to an Externally Applied Acceleration
Figure 18 shows a block diagram of the ADX L05. T he voltage
output from the central plate of the sensor is buffered and then
applied to a synchronous demodulator which is clocked, in
phase, with the same oscillator that drives the fixed plates
of the sensor. If the applied voltage is in sync and in phase
with the clock, a positive output will result. If the applied volt-
age is in sync but 180
°
out of phase with the clock, then the
demodulator’s output will be negative. All other signals will be
rejected. An external capacitor, C1, sets the bandwidth of the
demodulator.
CS1
CS2
+3.4V
+1.8V +0.2V
COM
+3.4V
V
REF
+5V
INTERNAL
REFERENCE
+1.8V
V
IN–
ABUFFER
V
OUT
OS1MHz
+0.2V
0
°
180
°
+1.8V
3M
DCAPACITOR
C1
C1
33k
33k
+5V
PREAMP
+1.8V
LOOP GAIN = 10
V
PR
INTERNAL
RST
SYNCHRONOUS
+3.4V
75
+3.4V
SYNC
COMMON
+5V
+5V
EXTERNAL
C2
DENOTES EXTERNAL
+3.4V
SEL(ST)
50k
BEAM
Figure 18. Functional Block Diagram