參數(shù)資料
型號(hào)： ADV7341BSTZ
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
中文描述： SERIAL INPUT LOADING, 12-BIT DAC, PQFP64
封裝： ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁(yè)數(shù)： 50/88頁(yè)
文件大小： 1066K
代理商： ADV7341BSTZ
ADV7340/ADV7341
ED/HD TIMING RESET
Subaddress 0x34, Bit 0
An ED/HD timing reset is achieved by toggling the ED/HD
timing reset control bit (Subaddress 0x34, Bit 0) from 0 to 1.
In this state, the horizontal and vertical counters remain reset.
When this bit is set back to 0, the internal counters resume
counting. This timing reset applies to the ED/HD timing
counters only.
SD SUBCARRIER FREQUENCY LOCK, SUBCARRIER
PHASE RESET, AND TIMING RESET
Subaddress 0x84, Bits[2:1]
Together with the SFL/MISO pin and SD Mode Register 4
(Subaddress 0x84, Bits[2:1]), the ADV7340/ADV7341 can be used
in timing reset mode, subcarrier phase reset mode, or SFL mode.
Timing Reset (TR) Mode
In this mode (Subaddress 0x84, Bits[2:1] = 10), a timing reset is
achieved in a low-to-high transition on the SFL/MISO pin (Pin 48).
In this state, the horizontal and vertical counters remain reset.
Upon releasing this pin (set to low), the internal counters resume
counting, starting with Field 1, and the subcarrier phase is reset.
The minimum time the pin must be held high is one clock
cycle; otherwise, this reset signal might not be recognized. This
timing reset applies to the SD timing counters only.
Rev. 0 | Page 50 of 88
Subcarrier Phase Reset (SCR) Mode
In this mode (Subaddress 0x84, Bits[2:1] = 01), a low-to-high
transition on the SFL/MISO pin (Pin 48) resets the subcarrier
phase to 0 on the field following the subcarrier phase reset. This
reset signal must be held high for a minimum of one clock cycle.
Because the field counter is not reset, it is recommended that
the reset signal be applied in Field 7 (PAL) or Field 3 (NTSC).
The reset of the phase then occurs on the next field, that is,
Field 1, lined up correctly with the internal counters. The field
count register at Subaddress 0xBB can be used to identify the
number of the active field.
Subcarrier Frequency Lock (SFL) Mode
In this mode (Subaddress 0x84, Bits[2:1] = 11), the ADV7340/
ADV7341 can be used to lock to an external video source. The
SFL mode allows the ADV7340/ADV7341 to automatically alter
the subcarrier frequency to compensate for line length
variations. When the part is connected to a device such as an
ADV7403
video decoder (see Figure 62) that outputs a digital
data stream in the SFL format, the part automatically changes to
the compensated subcarrier frequency on a line-by-line basis.
This digital data stream is 67 bits wide, and the subcarrier is
contained in Bit 0 to Bit 21. Each bit is two clock cycles long.
DISPLAY
NO TIMING RESETAPPLIED
TIMING RESETAPPLIED
START OF FIELD 4 OR 8
F
SC
PHASE = FIELD 4 OR 8
F
SC
PHASE = FIELD 1
TIMING RESET PULSE
307
310
307
1
2
3
4
5
6
7
21
313
320
DISPLAY
START OF FIELD 1
0
Figure 60. SD Timing Reset Timing Diagram (Subaddress 0x84, Bits[2:1] = 10)
NO F
SC
RESET APPLIED
F
SC
PHASE = FIELD 4 OR 8
307
310
313
320
DISPLAY
START OF FIELD 4 OR 8
F
SC
RESET APPLIED
F
SC
RESET PULSE
F
SC
PHASE = FIELD 1
307
310
313
320
DISPLAY
START OF FIELD 4 OR 8
0
Figure 61. SD Subcarrier Phase Reset Timing Diagram (Subaddress 0x84, Bits[2:1] = 01)
相關(guān)PDF資料
PDF描述
ADV7341EBZ Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7343BSTZ Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7342 Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7342BSTZ Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7343 Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7341EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder, Six 12-Bit Noise Shaped Video㈢ DACS
ADV7342 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7342BSTZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7343 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7343BSTZ 功能描述:IC ENCODER VIDEO W/DAC 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
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