![](http://datasheet.mmic.net.cn/310000/ADV7300A_datasheet_16243960/ADV7300A_50.png)
REV. A
–50–
ADV7300A/ADV7301A
600R
6.8pF
300R
DAC O/P
75R
BNC O/P
6.8 H
2.2 H
18pF
300R
600R
Figure 75. Example of Output for Output Filter for
PS, 4 Oversampling
CIRCUIT FREQUENCY RESPONSE – Hz
–60
10M
0n
–240
5n
–120
10n
0
15n
120
20n
240
25n
360
30n
480
–50
–40
–30
–20
–10
0
GROUP DELAY (sec)
PHASE (Deg)
MAGNITUDE (dB)
100M
F
Figure 76. Filter Plot for Output Filter for PS, 4
Oversampling
500R
33pF
DAC O/P
75R
BNC O/P
470nH
220nH
82pF
500R
75R
300R
Figure 77. Example for Output Filter HDTV, 2
Oversampling
CIRCUIT FREQUENCY RESPONSE – MHz
–60.0
1
10
100
0n
–203
2n
–102
4n
0
6n
97.6
8n
198
10n
298
12n
398
–51.4
–42.9
–34.3
–25.7
–8.6
0
MAGNITUDE (dB)
GROUP DELAY (sec)
PHASE (Deg)
F
14n
498
–17.1
Figure 78. Filter Plot for Output Filter for HDTV,
2 Oversampling
Table XXIV. Possible Output Rates
Input Mode
Addr 01h, Bits 6–4
PLL
Addr 00h, Bit 1
Output Rate
SD
Off
On
27 MHz (2 )
108 MHz (8 )
PS
Off
On
27 MHz (1 )
108 MHz (4 )
HDTV
Off
On
74.25 MHz (1 )
148.5 MHz (2 )
SD and
Off
On
Off
On
27 MHz (2 )
108 MHz (8 )
27 MHz (1 )
108 MHz (4 )
PS
SD
*
and
Off
On
Off
On
27 MHz (2 )
108 MHz (8 )
74.25 MHz (1 )
74.25 MHz (1 )
HDTV
SD and
Off
On
Off
On
27 MHz (2 )
27 MHz (2 )
74.25 MHz (1 )
148.5 MHz (2 )
HDTV
*
*
Oversampled
PCB Board Layout Considerations
The ADV7300A/ADV7301A is optimally designed for lowest
noise performance, both radiated and conducted noise. To
complement the excellent noise performance of the ADV7300A/
ADV7301A, it is imperative that great care be given to the PC
board layout. The layout should be optimized for the lowest
noise on the ADV7300A/ADV7301A power and ground lines.
This can be achieved by shielding the digital inputs and provid-
ing good decoupling. The lead length between groups of V
AA
and AGND, V
DD
and DGND, and V
DD_IO
and GND_IO pins
should be kept as short as possible to minimize
inductive ringing.
It is recommended that a four-layer printed circuit board be
used with power and ground planes separating the layer of the
signal carrying traces of the components and solder side layer.
Placement of components should take into account noisy cir-
cuits, such as crystal clocks, high speed logic circuitry, and
analog circuitry.
There should be a separate analog ground plane and a separate
digital ground plane.
Power planes should encompass a digital and an analog power
plane. The analog power plane should contain the DACs and all
associated circuitry, V
REF
circuitry. The digital power plane
should contain all logic circuitry. The analog and digital power
planes should be individually connected to the common power
plane at one single point through a suitable filtering device, such
as a ferrite bead.
DAC output traces on a PCB should be treated as transmission
lines. It is recommended that the DACs be placed as close as
possible to the output connector, with the analog output traces
being as short as possible (less than three inches). The DAC
termination resistors should be placed as close as possible to the
DAC outputs and should overlay the PCB’s ground plane. As