參數(shù)資料
型號(hào)： ADV7185KST
廠商： ANALOG DEVICES INC
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output
中文描述： COLOR SIGNAL DECODER, PQFP80
封裝： PLASTIC, LQFP-80
文件頁(yè)數(shù)： 8/41頁(yè)
文件大?。?/td> 730K
代理商： ADV7185KST
REV. 0
–8–
ADV7185
PIN FUNCTION DESCRIPTIONS (continued)
Pin
Mnemonic
Input/Output
Function
39, 40, 47, 53,
56, 63
41, 43, 45, 57,
59, 61
42, 44, 46, 58,
60, 62
48, 49
50
51
52
54, 55
64
65
AVSS
G
Ground for Analog Supply
AVSS1–AVSS6
G
Analog Input Channels. Ground if single-ended mode is selected. These pins
should be connected directly to REFOUT when differential mode is selected.
Video Analog Input Channels
AIN1–AIN6
I
CAPY1–CAPY2
AVDD
REFOUT
CML
CAPC1–CAPC2
RESET
ISO
I
P
O
O
I
I
I
ADC Capacitor Network
Analog Supply Voltage (5 V)
Internal Voltage Reference Output
Common-Mode Level for ADC
ADC Capacitor Network
System Reset Input. Active Low
Input Switch Over. A low to high transition on this input indicates to the
decoder core that the input video source has been changed externally and
configures the decoder to reacquire the new timing information of the new
source. This is useful in applications where external video muxes are used.
This input gives the advantage of faster locking to the external muxed
video sources. A low to high transition triggers this input.
TTL Address Input. Selects the MPU address:
MPU address = 88h ALSB = 0, disables I
2
C filter
MPU address = 8Ah ALSB = 1, enables I
2
C filter
MPU Port Serial Data Input/Output
MPU Port Serial Interface Clock Input
VREF or Vertical Reference Output Signal. Indicates start of next field.
VRESET
or Vertical Reset Output is a signal that indicates the beginning
of a new field. In SCAPI/CAPI mode this signal is one clock wide and
active low relative to CLKIN. It immediately follows the
HRESET
pixel,
and indicates that the next active pixel is the first active pixel of the next field.
HREF or Horizontal Reference Output Signal. A dual-function pin
(enabled when Line-Locked Interface is selected, OM_SEL[1:0] = 0,0),
this signal is used to indicate data on the YUV output. The positive slope
indicates the beginning of a new active line, HREF is always
720 Y samples long.
HRESET
or Horizontal Reset Output (enabled when
SCAPI or CAPI is selected, OM_SEL[1:0] = 0, 1 or 1, 0) is a signal that
indicates the beginning of a new line of video. In SCAPI/CAPI this signal
is one clock cycle wide and is output relative to CLKIN. It immediately
follows the last active pixel of a line. The polarity is controlled via PHVR.
Asynchronous FIFO Read Enable Signal. A logical high on this pin
enables a read from the output of the FIFO.
DV or Data Valid Output Signal. In SCAPI/CAPI mode, DV performs
two functions, depending on whether SCAPI or CAPI is selected. It
toggles high when the FIFO has reached the AFF margin set by the user,
and remains high until the FIFO is empty. The alternative mode is where
it can be used to control FIFO reads for bursting information out of the
FIFO. In API mode DV indicates valid data in the FIFO, which includes
both pixel information and control codes. The polarity of this pin is con-
trolled via PDV.
Output Enable Controls Pixel Port Outputs. A logic high will three-state
P19–P0.
ODD/EVEN Field Output Signal. An active state indicates that an even field
is being digitized. The polarity of this signal is controlled by the PF bit.
66
ALSB
I
67
68
69
SDATA
SCLOCK
VREF/
VRESET
I/O
I
O
70
HREF/
HRESET
O
77
RD
I
78
DV
O
79
OE
I
80
FIELD
O
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7186 制造商:AD 制造商全稱:Analog Devices 功能描述:Video Decoder and Display Processor
ADV7186BBCZ 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
ADV7186BBCZ-RL 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
ADV7186BBCZ-T 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
ADV7186BBCZ-TL 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
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