參數(shù)資料
型號(hào): ADV7185KST
廠商: ANALOG DEVICES INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output
中文描述: COLOR SIGNAL DECODER, PQFP80
封裝: PLASTIC, LQFP-80
文件頁數(shù): 28/41頁
文件大小: 730K
代理商: ADV7185KST
REV. 0
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ADV7185
Table XX. Status Register
1
(Subaddress 10)
Bit Description
STATUS[7:0]
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
2
0
1
Color Kill Active
0
1
White Peak Active
0
1
ADC Overflow Detected
0
1
ADC Underflow Detected
0
1
50 Hz Field Rate Auto Detected
0
1
F
SC
Locked (current)
0
1
Lost Lock (since last read)
0
1
In Lock (current)
NOTES
1
Read only
2
Provides information about the internal status of the decoder.
Table XXI. Info Register
1
(Subaddress 11)
Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
IDENT[7:0]
2
X
X
X
X
NOTES
1
Read only
2
Provides identification on the revision of the part.
X
X
X
X
0 = v85a, 3 = v85b, 4 = v85b3
Table XXII. Analog Control Internal Register (Subaddress 13)
Bit Description
TIM_OE
*
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
0
1
Dependent on
OE
and TOD
HS, VS, F Forced Active
Set at Default Value
RESERVED
*
Timing Signals Output. Enables the user to force the output drivers for H-SYNC,V-SYNC, and Field into an active state regardless of the
OE
pin and TOD bit.
0
1
0
0
0
1
1
Table XXIII. Analog Clamp Control Register (Subaddress 14)
Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
FICL[1:0]
1
0
0
1
1
0
1
0
1
I On for 16 Clock Cycles
I On for 32 Clock Cycles
I On for 64 Clock Cycles
I On for 128 Clock Cycles
I On for 16 Clock Cycles
I On for 32 Clock Cycles
I On for 64 Clock Cycles
I On for 128 Clock Cycles
I Sources Switched Off
I Sources Enabled
Voltage Clamp Disabled
Voltage Clamp Enabled
Set to Zero
FACL[1:0]
2
0
0
1
1
0
1
0
1
CCLEN
3
0
1
VCLEN
4
0
1
RESERVED
NOTES
1
Fine Clamp Length. Controls the number of clock cycles for which the slow current is on.
2
Fast Clamp Length. Controls the number of clock cycles for which the fast current is on.
3
Current Clamp Enable. Allows the user to switch off the I sources in the analog front end.
4
Voltage Clamp Enable. Allows the user to disable the voltage clamp circuitry.
0
0
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ADV7186 制造商:AD 制造商全稱:Analog Devices 功能描述:Video Decoder and Display Processor
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