參數(shù)資料
型號: ADV7183BBSTZ
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Multiformat SDTV Video Decoder
中文描述: COLOR SIGNAL DECODER, PQFP80
封裝: LEAD FREE, MS-026-BEC, LQFP-80
文件頁數(shù): 95/100頁
文件大小: 844K
代理商: ADV7183BBSTZ
ADV7183B
ANTIALIASING FILTERS
For inputs from some video sources that are not bandwidth
limited, signals outside the video band can alias back into the
video band during A/D conversion and appear as noise on the
output video. The ADV7183B oversamples the analog inputs by
a factor of 4. This 54 MHz sampling frequency reduces the
requirement for an input filter; for optimal performance, it is
recommended that an antialiasing filter be used. The
recommended low cost circuit for implementing this buffer and
filter circuit for all analog input signals is shown in
272H
Figure 45.
Rev. B | Page 95 of 100
The buffer is a simple emitter-follower using a single npn
transistor. The antialiasing filter is implemented using passive
components. The passive filter is a third-order Butterworth
filter with a 3 dB point of 9 MHz. The frequency response of
the passive filter is shown in
273H
Figure 43. The flat pass band up to
6 MHz is essential. The attenuation of the signal at the output of
the filter due to the voltage divider of R24 and R63 is
compensated for in the ADV7183B part by using the automatic
gain control. The ac-coupling capacitor at the input to the
buffer creates a high-pass filter with the biasing resistors for the
transistor. This filter has a cutoff of
{2 × π × (
R39
||
R89
) ×
C93
}
–1
= 0.62 Hz
It is essential that the cutoff of this filter be less than 1 Hz to
ensure correct operation of the internal clamps within the part.
These clamps ensure the video stays within the 5 V range of the
op amp used.
0
–20
–40
–60
–80
–100
–120
100k
30M
10M
3M
FREQUENCY (Hz)
1M
300k
300M
1G
100M
0
Figure 43. Third-Order Butterworth Filter Response
CRYSTAL LOAD CAPACITOR VALUE SELECTION
274H
Figure 44 shows an example of a reference clock circuit for the
ADV7183B. Special care must be taken when using a crystal
circuit to generate the reference clock for the ADV7183B. Small
variations in reference clock frequency can cause autodetection
issues and impair the ADV7183B performance.
Load capacitor values are dependant on crystal attributes.
The load capacitance given in a crystal data sheet specifies the
parallel resonance frequency within the tolerance at 25°C.
Therefore, it is important to design a circuit that matches the
load capacitance to achieve the frequency stipulated by the
manufacturer. For accurate crystal circuit design and
optimization, an applications note on crystal design
considerations is available for more information.
XTAL
0
C1
47pF
C2
47pF
R = 1M
Ω
XTAL
28.63636MHz
XTAL1
Figure 44. Crystal Circuit
Follow these guidelines to ensure correct operation:
Use the correct frequency crystal, which is 28.63636 MHz.
Tolerance is 50 ppm or higher.
Use a parallel-resonant crystal.
Place a 1 MΩ shunt resistor across pins XTAL and
XTAL1, as is shown in
275H
Figure 44.
Know the C
LOAD
for the crystal part number selected. The
value of Capacitor C1 and Capacitor C2 must match C
LOAD
for the specific crystal part number in the user’s system.
Use the following guideline to find C
LOAD
:
C
1 =
C
2 =
C
C
= 2(
C
LOAD
C
S
)
C
pg
where:
C
pg
is the pin-to-ground capacitance, approximately 4 pF
to 10 pF.
C
S
is the PCB stray capacitance, approximately 2 pF to
3 pF.
For Example,
C
LOAD
= 30 pF
C = 2(30 3) 4
= 50 pF
Therefore, two 47 pF capacitors may be selected for C1
and C2.
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參數(shù)描述
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