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參數(shù)資料
| 型號： | ADV7183B |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | 標(biāo)清多格式視頻解碼器 |
| 文件頁數(shù)： | 18/100頁 |
| 文件大?。?/td> | 844K |
| 代理商： | ADV7183B |
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ADV7183B
Drive Strength Selection (Clock)
DR_STR_C[1:0] Address 0xF4[3:2]
The DR_STR_C[1:0] bits can be used to select the strength of
the clock signal output driver (LLC pin). For more information,
refer to the
157H
Drive Strength Selection (Sync) and the
158H
Drive
Strength Selection (Data) sections.
Table 12. DR_STR_C Function
DR_STR_C[1:0]
Description
00
Low drive strength (1×)
01 (default)
Medium low drive strength (2×)
10
Medium high drive strength (3×)
11
High drive strength (4×)
Drive Strength Selection (Sync)
DR_STR_S[1:0] Address 0xF4[1:0]
The DR_STR_S[1:0] bits allow the user to select the strength of
the synchronization signals with which HS, VS, and F are
driven. For more information, refer to the
159H
Drive Strength
Selection (Clock) and the
160H
Drive Strength Selection (Data)
sections.
Table 13. DR_STR_S Function
DR_STR_S[1:0]
Description
00
Low drive strength (1×)
01 (default)
Medium low drive strength (2×)
10
Medium high drive strength (3×)
11
High drive strength (4×)
Rev. B | Page 18 of 100
Enable Subcarrier Frequency Lock Pin
EN_SFL_PIN Address 0x04[1]
The EN_SFL_PIN bit enables the output of subcarrier lock
information (also known as GenLock) from the ADV7183B to
an encoder in a decoder-encoder back-to-back arrangement.
When EN_SFL_PIN is 0 (default), the subcarrier frequency lock
output is disabled.
When EN_SFL_PIN is 1, the subcarrier frequency lock infor-
mation is presented on the SFL pin.
Polarity LLC Pin
PCLK Address 0x37[0]
The polarity of the clock that leaves the ADV7183B via the
LLC1 and LLC2 pins can be inverted using the PCLK bit.
Changing the polarity of the LLC clock output can be necessary
to meet the setup-and-hold time expectations of follow-on
chips.
This bit also inverts the polarity of the LLC2 clock.
When PCLK is 0, the LLC output polarity is inverted.
When PCLK is 1 (default), the LLC output polarity is normal
(as per the timing diagrams).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7183BBSTZ | Multiformat SDTV Video Decoder |
| ADV7183BKSTZ | Multiformat SDTV Video Decoder |
| ADV7183KST | Advanced Video Decoder with 10-Bit ADC and Component Input Support |
| AD7183 | Advanced Video Decoder with 10-Bit ADC and Component Input Support |
| ADV7185 | Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7183BBSTZ | 功能描述:IC VIDEO DECODER NTSC 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7183BKST | 制造商:Analog Devices 功能描述:MULTIFORMAT SDTV VID DECODER 80LQFP - Bulk |
| ADV7183BKSTZ | 功能描述:IC VIDEO DECODER NTSC 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7183KST | 制造商:Analog Devices 功能描述:Video Decoder 2ADC 10-Bit 80-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:VIDEO DECODER I.C. - Bulk |
| ADV7184 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder with Fast Switch Overlay Support |
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