參數(shù)資料
型號(hào)： ADV7172KST
廠商： ANALOG DEVICES INC
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： Digital PAL/NTSC Video Encoder with Six DACs 10 Bits, Color Control and Enhanced Power Management
中文描述： COLOR SIGNAL ENCODER, PQFP48
封裝： PLASTIC, TQFP-48
文件頁(yè)數(shù)： 15/59頁(yè)
文件大小： 455K
代理商： ADV7172KST
ADV7172/ADV7173
–15–
REV. A
YUV LEVELS
This functionality is under the control of Mode Register 5, Bits
2–0. Bit 0 (MR50) allows the ADV7172/ADV7173 to output
SMPTE levels on the Y output when configured in NTSC mode,
and Betacam levels on the Y output when configured in PAL
mode and vice-versa.
Video
Sync
Betacam
286 mV
714 mV
SMPTE
300 mV
700 mV
As the datapath is branched at the output of the filters, the
luma signal relating to the CVBS or S-Video Y/C output is
unaltered. Only the Y output of the YUV outputs is scaled.
Bits 2–1 (MR52–MR51) allow UV levels to have a peak-peak
amplitude of 700 mV or 1000 mV, or the default values of
934 mV in NTSC and 700 mV in PAL.
AUTODETECT CONTROL
The ADV7172/ADV7173 provides the option of automatically
powering down the DACs A, B and C if they are not correctly
terminated (i.e., the 75
cable is not connected to the DAC).
The voltage at the output of DACs A and B are compared to
a selected reference level. This reference voltage (MR64) will
depend on whether the user terminates with 37.5
(75
con-
nected on the DAC end and 75
connected at TV end of cable,
i.e., combined load of 37.5
) or 75
. It cannot operate in a
DAC buffering configuration. There are two modes of auto-
detect operation provided by the ADV7172/ADV7173:
(1) Mode 0: The state of termination of the DAC may be read
by reading the status bits in Mode Register 6. MR67 status bit
indicates whether or not the composite DAC is terminated,
MR66 status bit indicates whether or not the luma DAC is
terminated. The user may then decide whether or not to power
down the DACs using MR15–MR0.
(2) Mode 1: The state of the DACs may be read as in Mode 0.
If either of the DACs is unterminated, they are automatically
powered down. If the luma DAC, DAC B is powered down then
DAC C, the chroma DAC, will also be powered down. The
state of termination of the DAC is checked each frame to decide
whether or not it is to be powered up or down.
Mode Register 6, Bits 3–2, indicates which mode of operation is
used. Note that Mode Register 1, Bits 5-3, must be enabled
(“1”) for autodetect functionality to work. (DACs A, B, C are
enabled.)
Vertical Blanking Data Insertion
It is possible to allow encoding of incoming YCbCr data on
those lines of VBI that do not have line sync or pre-/post-
equalization pulses (see Figures 24 to 25). This mode of opera-
tion is called “Partial Blanking” and is selected by setting MR32
to “1.” It allows the insertion of any VBI data (Opened VBI)
into the encoded output waveform. This data is present in digi-
tized incoming YCbCr data stream (e.g., WSS data, CGMS,
VPS etc.). Alternatively the entire VBI may be blanked (no VBI
data inserted) on these lines by setting MR32 to “0.”
The complete VBI comprises of the following lines:
525/60 systems, Lines 525 to 21 for Field 1 and Lines 262 to
Line 284 for Field 2.
625/50 systems, Lines 624 to Line 22 and lines 311 to 335.
The “Opened VBI” consists of:
525/60 systems, Lines 10 to 21 for Field 1 and second half of
Line 273 to Line 284 for Field 2.
625/50 systems, Line 7 to Line 22 and Lines 319 to 335.
SUBCARRIER RESET
Together with the SCRESET/RTC PIN and Bits MR42 and
MR41 of Mode Register 4, the ADV7172/ADV7173 can be
used in subcarrier reset mode. The subcarrier phase will reset
to Field 0 at the start of the following field when a low to high
transition occurs on this input pin.
REAL-TIME CONTROL
Together with the SCRESET/RTC PIN and Bits MR42 and
MR41 of Mode Register 4, the ADV7172/ADV7173 can be
used to lock to an external video source. The real-time control
mode allows the ADV7172/ADV7173 to automatically alter the
subcarrier frequency to compensate for line length variation.
When the part is connected to a device that outputs a digital
data stream in the RTC format (such as a ADV7185 video
decoder, see Figure 22), the part will automatically change to
the compensated subcarrier frequency on a line-by-line basis.
This digital data stream is 67 bits wide and the subcarrier is
contained in Bits 0 to 21. Each bit is two clock cycles long.
00Hex should be written into all four subcarrier frequency
registers when using this mode.
VIDEO TIMING DESCRIPTION
The ADV7172/ADV7173 is intended to interface to off-the-
shelf MPEG1 and MPEG2 Decoders. As a consequence, the
ADV7172/ADV7173 accepts 4:2:2 YCrCb Pixel Data via a
CCIR-656 pixel port and has several video timing modes of
operation that allow it to be configured as either system master
video timing generator or a slave to the system video timing
generator. The ADV7172/ADV7173 generates all of the re-
quired horizontal and vertical timing periods and levels for the
analog video outputs.
The ADV7172/ADV7173 calculates the width and placement
of analog sync pulses, blanking levels and color burst envelopes.
Color bursts are disabled on appropriate lines and serration and
equalization pulses are inserted where required.
In addition, the ADV7172/ADV7173 supports a PAL or NTSC
square pixel operation in slave mode. The part requires an
input pixel clock of 24.5454 MHz for NTSC and an input pixel
clock of 29.5 MHz for PAL. The internal horizontal line counters
place the various video waveform sections in the correct loca-
tion for the new clock frequencies.
The ADV7172/ADV7173 has four distinct master and four
distinct slave timing configurations. Timing control is estab-
lished with the bidirectional
SYNC
,
BLANK
and FIELD/
VSYNC
pins. Timing Mode Register 1 can also be used to
vary the timing pulsewidths and where they occur in relation to
each other.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7172KST-REEL 制造商:Analog Devices 功能描述:
ADV7172KSTZ 制造商:Analog Devices 功能描述:
ADV7172KSTZ-REEL 功能描述:IC DAC VIDEO NTSC 6-CH 48-LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類(lèi)型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱(chēng):Q4645799
ADV7173 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with Six DACs 10 Bits, Color Control and Enhanced Power Management
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