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參數(shù)資料
| 型號(hào)： | ADV7150LS220 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顯示控制器 |
| 英文描述： | CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC |
| 中文描述： | PALETTE-DAC DSPL CTLR, PQFP160 |
| 封裝： | POWER, PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 31/36頁(yè) |
| 文件大?。?/td> | 447K |
| 代理商： | ADV7150LS220 |
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ADV7150
–31–
REV. A
E xample 2
Color Mode
Multiplexing
Databus
RAM-DAC Resolution
SYNC
Pedestal
Calibration
24-Bit Gamma Corrected True Color (30 Bits)
2:1
10 Bit
10 Bit
Ignored
0 IRE
Every Vertical Sync
Register Initialization
Write
0FH to Mode Register (MR1)
Write
0EH to Mode Register (MR1)
Write
0FH to Mode Register (MR1)
Write
2FH to Mode Register (MR1)
Write
0FH to Mode Register (MR1)
Write
04H to Address Register (A7–A0)
Write
FFH to Pixel Mask Register
Write
05H to Address Register (A7–A0)
Write
01H to Command Reg 1 (CR1)
Write
06H to Address Register (A7–A0)
Write
E0H to Command Reg 2 (CR2)
Write
07H to Address Register (A7–A0)
Write
41H to Command Reg 3 (CR3)
Color Palette RAM Initialization
Write
00H to Address Register (A7–A0)
Write
000H (Red Data) to RAM Location (00H)
Write
000H (Green Data) to RAM Location (00H)
Write
000H (Blue Data) to RAM Location (00H)
Write
xxxH (Red Data) to RAM Location (01H)
Write
xxxH (Green Data) to RAM Location (01H)
Write
xxxH (Blue Data) to RAM Location (01H)
Write
3FFH (Red Data) to RAM Location (FFH)
Write
3FFH (Green Data) to RAM Location (FFH)
Write
3FFH (Blue Data) to RAM Location (FFH)
C1
1
1
1
1
1
0
1
0
0
0
1
0
1
C1
0
0
0
0
0
0
0
0
0
0
C0
1
1
1
1
1
0
0
0
0
0
0
0
0
C0
0
1
1
1
1
1
1
1
1
1
R/
W
0
0
0
0
0
0
0
0
0
0
0
0
0
R/
W
0
0
0
0
0
0
0
0
0
0
C omment
Resets to Normal Operation, 10-Bit Bus/RAM-DAC
*(Initializes Pipelining
*(
“
*(Calibrates LOADOUT /LOADIN T iming
*(
“
Address Reg Points to Pixel Mask Register
Sets the Pixel Mask to All “1s”
Address Reg Points to Command Register 1 (CR1)
Calibrates Every Vertical Sync
Address Reg Points to Command Register 2 (CR2)
Sets 24-Bit Color, 0 IRE, No
SYNC
Address Reg Points to Command Register 3 (CR3)
Sets 2:1 Multiplexing, PRGCK OUT =
CLOCK
/8
Comment
Points to Color Palette RAM
(Initializes Palette RAM
(
to a “Gamma” Ramp**
(
(
(
(
(
(
(
(
(RAM Initialization Complete
*
*T hese four command lines reset the ADV7150 T he pipelines for each of the Red, Green and Blue pixel inputs are synchronously reset to the Multiplexer’s “A” in-
put. Mode Register bit MR10 is written by a “1” followed by “0” followed by “1.” LOADIN/LOADOUT timing is internally synchronized by writing a “0” followed
by a “1” followed by a “0” to Mode Register MR15.
**Data for a gamma curve characteristic is obtainable in Appendix 3.
RE GIST E R DIAGNOST IC T E ST ING
T he previous examples show the register initialization sequence
for the ADV7150. T hese show control data going to the regis-
ters and palette RAM. As well as this writing function, it may
also be necessary, due to system diagnostic requirements, to
confirm that correct data has been transferred to each register
and palette RAM location. T here are two ways to incorporate
register value/RAM value checking:
1
. READ after each WRITE:
After data is written to a particular
register, it can be read back immediately. T he following table
shows an example with Command Registers CR2 and CR3.
C 1 C 0
0
1
1
0
1
1
R/
W
0
0
1
0
0
1
D0–D7
06H
E0H
E0H
07H
40H
40H
C omment
Select Command Register 2 (CR2)
Sets 24-Bit T rue-Color
Command Reg 2 Value Read-Back
Select Command Register 3 (CR3)
Set 2:1 Mux Mode
Command Reg 3 Value Read-Back
0
0
0
0
0
0
2.
READ after all WRITEs completed:
All registers and the
color palette RAM are written to and set. Once this is
complete, all registers are again accessed but this time in
Read-Only mode. T he table below shows this method for
Command Registers CR2 and CR3.
C 1
0
1
0
1
0
1
0
1
1
It is clear that this latter case requires more command lines
than the previous READ after each WRIT E case.
C 0
0
0
0
0
0
0
0
0
0
R/
W
0
0
0
0
0
1
0
1
1
D0–D7
06H
E0H
07H
40H
06H
E0H
07H
40H
40H
C omment
Select Command Register 2 (CR2)
Sets 24-Bit T rue-Color
Select Command Register 3 (CR3)
Set 2:1 Mux Mode
Select CR2
CR2 Value Read-Back
Select CR3
CR3 Value Read-Back
CR3 Value Read-Back
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| adv7150ls85 | 制造商:Rochester Electronics LLC 功能描述:220MHZ 3X10 BIT VIDEO DAC - Bulk 制造商:Analog Devices 功能描述: |
| ADV7151 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS 220 MHz Pseudo-Color Graphics Triple 10-Bit Video RAM-DAC |
| ADV7151KS110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7151KS135 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| ADV7151KS170 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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