- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄374040 > ADuC848 (Analog Devices, Inc.) MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU PDF資料下載
參數(shù)資料
| 型號(hào)： | ADuC848 |
| 廠商： | Analog Devices, Inc. |
| 元件分類(lèi)： | ADC |
| 英文描述： | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| 中文描述： | MicroConverter的多通道ADC的24-/16-Bit與嵌入式62 kB閃存以及單周期控制器 |
| 文件頁(yè)數(shù)： | 68/108頁(yè) |
| 文件大?。?/td> | 1109K |
| 代理商： | ADUC848 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)當(dāng)前第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)
ADuC845/ADuC847/ADuC848
POWER SUPPLY MONITOR
The power supply monitor, once enabled, monitors the DV
DD
and AV
DD
supplies on the parts. It indicates when any of the
supply pins drop below one of four user-selectable voltage trip
points from 2.63 V to 4.63 V. For correct operation of the power
supply monitor function, AV
DD
must be equal to or greater than
2.63 V. Monitor function is controlled via the PSMCON SFR. If
enabled via the IEIP2 SFR, the monitor interrupts the core by
using the PSMI bit in the PSMCON SFR. This bit is not cleared
until the failing power supply returns above the trip point for at
least 250 ms.
Rev. A | Page 68 of 108
The monitor function allows the user to save working registers
to avoid possible data loss due to the low supply condition, and
also ensures that normal code execution does not resume until a
Table 43. PSMCON SFR Bit Designations
Bit No.
Name
Description
7
CMPD
DV
DD
Comparator Bit.
This read-only bit directly reflects the state of the DV
DD
comparator.
Read 1 indicates that the DV
DD
supply is above its selected trip point.
Read 0 indicates that the DV
DD
supply is below its selected trip point.
6
CMPA
AV
DD
Comparator Bit.
This read-only bit directly reflects the state of the AV
DD
comparator.
Read 1 indicates that the AV
DD
supply is above its selected trip point.
Read 0 indicates that the AV
DD
supply is below its selected trip point.
5
PSMI
Power Supply Monitor Interrupt Bit.
Set high by the MicroConverter if either CMPA or CMPD is low, indicating low analog or digital supply. The PSMI
bit can be used to interrupt the processor. Once CMPD and/or CMPA returns (and remains) high, a 250 ms
counter is started. When this counter times out, the PSMI interrupt is cleared. PSMI can also be written by the
user. However, if either comparator output is low, it is not possible for the user to clear PSMI.
DV
DD
Trip Point Selection Bits.
A 5 V part has no valid PSM trip points. If the DV
DD
supply falls below the 4.63 V point, the part resets (POR). For a
3 V part, all relevant PSM trip points are valid. The 3 V POR trip point is 2.63 V (fixed).
These bits select the DV
DD
trip point voltage as follows:
TPD1
TPD0
Selected DV
DD
Trip Point (V)
0
0
4.63
0
1
3.08
1
0
2.93
1
1
2.63
AV
DD
Trip Point Selection Bits. These bits select the AV
DD
trip point voltage as follows:
TPA1
TPA0
Selected AV
DD
Trip Point (V)
0
0
4.63
0
1
3.08
1
0
2.93
1
1
2.63
0
PSMEN
Power Supply Monitor Enable Bit.
Set to 1 by the user to enable the power supply monitor circuit.
Cleared to 0 by the user to disable the power supply monitor circuit.
safe supply level is well established. The supply monitor is also
protected against spurious glitches triggering the interrupt
circuit.
Note that the 5 V part has an internal POR trip level of 4.63 V,
which means that there are no usable DV
DD
PSM trip levels on
the 5 V part. The 3 V part has a POR trip level of 2.63 V
following a reset and initialization sequence, allowing all
relevant PSM trip points to be used.
PSMCON—Power Supply Monitor Control Register
SFR Address:
Power-On Default:
Bit Addressable:
DFH
DEH
No
4, 3
TPD1, TPD0
2, 1
TPA1, TPA0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADUC848BCP62-3 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BCP62-5 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BCP8-3 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC848BCP8-5 | Cable Gland (Clamp); Connector Shell Size:10SL, 12S; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Thread Size:5/8-24; Approval Categories:MIL-C-5015; Series:97 RoHS Compliant: No |
| ADUC848BS32-3 | MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC848BCP32-3 | 制造商:Analog Devices 功能描述:10 CHANNEL 16 BIT ADC + FLASH 8 BIT UP - Trays |
| ADUC848BCP32-5 | 制造商:Analog Devices 功能描述:10 CHANNEL 16 BIT ADC + FLASH 8 BIT UP - Trays |
| ADUC848BCP62-3 | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 56-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 12.85MHZ 3.3V 56LFCSP - Bulk |
| ADUC848BCP62-5 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 56-Pin LFCSP EP |
| ADUC848BCP8-3 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 56-Pin LFCSP EP 制造商:Analog Devices 功能描述:10 CHANNEL 16 BIT ADC + FLASH 8 BIT UP - Trays 制造商:Rochester Electronics LLC 功能描述:10 CHANNEL 16 BIT ADC + FLASH 8 BIT UP - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。