參數(shù)資料
型號(hào): ADUC842
廠商: Analog Devices, Inc.
元件分類: ADC
英文描述: CON, RTANG 68 POS
中文描述: 12 -位ADC和DAC的嵌入式高新技術(shù)高速62KB閃存微控制器
文件頁(yè)數(shù): 13/18頁(yè)
文件大小: 217K
代理商: ADUC842
REV. PrB
ADuC842
–13–
CLR C
C lear carry
1
1
CL R bit
Clear direct bit
2
2
SET B C
Set Carry
1
1
SET B bit
Set direct bit
2
2
CPL C
C omplement carry
1
1
CPL bit
Complement direct bit
2
2
ANL C ,bit
AND direct bit and carry
2
2
ANL C ,/bit
AND direct bit inverse to carry
2
2
ORL C ,bit
OR direct bit and carry
2
2
ORL C ,/bit
OR direct bit inverse to carry
2
2
MOV C ,bit
Move direct bit to carry
2
2
MOV bit,C
Move carry to direct bit
2
2
Branching
JMP @A+D PT R
Jump indirect relative to DPT R
1
3
R E T
Return from subroutine
1
4
R E T I
Return from interrupt
1
4
AC AL L addr11
Absolute jump to subroutine
2
3
AJMP addr11
Absolute jump unconditional
2
3
SJMP rel
Short jump (relative address)
2
3
JC rel
Jump on carry = 1
2
3
JNC rel
Jump on carry = 0
2
3
JZ rel
Jump on accumulator = 0
2
3
JNZ rel
Jump on accumulator != 0
2
3
DJNZ Rn,rel
Decrement register, jnz relative
2
3
L JM P
L ong jump unconditional
3
4
L C AL L addr16
Long jump to subroutine
3
4
JB bit,rel
Jump on direct bit = 1
3
4
JNB bit,rel
Jump on direct bit = 0
3
4
JBC bit,rel
Jump on direct bit = 1 and clear
3
4
C JNE A,dir,rel
Compare A, direct JNE relative
3
4
C JNE A,#data,rel
Compare A, immediate JNE relative
3
4
C JNE Rn,#data,rel
C ompare register, immediate JNE relative
3
4
C JNE @Ri,#data,rel
C ompare indirect, immediate JNE relative
3
4
D JNZ dir,rel
Decrement direct byte, JNZ relative
3
4
Miscellaneous
N OP
No operation
1
1
Notes:
1. One cycle is one clock.
2. Cycles of MOVX instructions are 4 cycles when they have 0 wait state. Cycles of MOVX instructions are 4+n cycles
when they have n wait states.
3. Cycles of LCALL instruction are 3 cycles when the LCALL instruction comes from interrupt.
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