I2" />
參數(shù)資料
型號(hào)： ADUC7126BSTZ126-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 82/108頁(yè)
文件大?。?/td> 0K
描述： IC MCU 16/32B 126KB FLASH 80LQFP
標(biāo)準(zhǔn)包裝： 1,000
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 41.78MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 40
程序存儲(chǔ)器容量： 126KB（63K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12x12b，D/A 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 80-LQFP
包裝： 帶卷 (TR)
Data Sheet
ADuC7124/ADuC7126
Rev. C | Page 75 of 108
Bit
Name
Description
5
I2CSETEN
I2C early transmit interrupt enable bit.
Setting this bit enables a transmit request interrupt just after the positive edge of SCL during the read bit
transmission.
Clear this bit to enable a transmit request interrupt just after the negative edge of SCL during the read bit
transmission.
4
I2CGCCLR
I2C general call status and ID clear bit.
Writing a 1 to this bit clears the general call status (I2CGC) and ID (I2CGCID[1:0]) bits in the I2CxSSTA register.
Clear this bit at all other times.
I2CHGCEN
I2C hardware general call enable.
When this bit and Bit 2 are set, and having received a general call (Address 0x00) and a data byte, the device
checks the contents of the I2CxALT against the receive register. If the contents match, the device has received a
hardware general call. This is used if a device needs urgent attention from a master device without knowing
which master it needs to turn to. This is a broadcast message to all master devices on the bus. The ADuC7124/
ADuC7126 watch for these addresses. The device that requires attention embeds its own address into the
message. All masters listen, and the one that can handle the device contacts its slave and acts appropriately.
The LSB of the I2CxALT register should always be written to 1, as per the I2C January 2000 bus specification.
Set this bit and I2CGCEN to enable hardware general call recognition in slave mode.
3
Clear this bit to disable recognition of hardware general call commands.
2
I2CGCEN
I2C general call enable.
Set this bit to enable the slave device to acknowledge an I2C general call, Address 0x00 (write). The device then
recognizes a data bit. If it receives a 0x06 (reset and write programmable part of the slave address by hard-
ware) as the data byte, the I2C interface resets as per the I2C January 2000 bus specification. This command can
be used to reset an entire I2C system. If it receives a 0x04 (write programmable part of the slave address by
hardware) as the data byte, the general call interrupt status bit sets on any general call.
The user must take corrective action by reprogramming the device address.
Set this bit to allow the slave ACK I2C general call commands.
Clear this bit to disable recognition of general call commands.
1
ADR10EN
I2C 10-bit address mode.
Set to 1 to enable 10-bit address mode.
Clear to 0 to enable normal address mode.
0
I2CSEN
I2C slave enable bit.
Set by the user to enable I2C slave mode.
Clear this bit to disable I2C slave mode.
I2C Slave Status Registers
Name:
I2C0SSTA, I2C1SSTA
Address:
0xFFFF082C, 0xFFFF092C
Default Value:
0x0000, 0x0000
Access:
Read only
Function:
This 16-bit MMR is the I2C status register in slave mode.
Table 110. I2CxSSTA MMR Bit Descriptions
Bit
Name
Description
15
Reserved.
14
I2CSTA
This bit is set to 1 if a start condition followed by a matching address is detected, a start byte (0x01) is
received, or general calls are enabled and a general call code of (0x00) is received.
This bit is cleared on receiving a stop condition.
13
I2CREPS
This bit is set to 1 if a repeated start condition is detected.
This bit is cleared on receiving a stop condition.
相關(guān)PDF資料
PDF描述
ADUC7129BSTZ126 IC DAS MCU ARM7 ADC/DDS 80-LQFP
ADUC812BSZ-REEL IC MCU FLASH 12BIT ADC 52MQFP
ADUC814BRU IC ADC 12BIT W/FLASH MCU 28TSSOP
ADUC816BCP IC MCU 8K FLASH ADC/DAC 56LFCSP
ADUC824BSZ-REEL IC MCU 8K FLASH ADC/DAC 52MQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADUC7128 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision Analog Microcontroller ARM7TDMI MCU with 12-bit ADC & DDS DAC
ADUC7128BCPZ126 功能描述:IC DAS MCU ARM7 ADC/DDS 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標(biāo)準(zhǔn)包裝:250 系列:LPC11Uxx 核心處理器:ARM? Cortex?-M0 芯體尺寸:32-位 速度:50MHz 連通性:I²C，Microwire，SPI，SSI，SSP，UART/USART，USB 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:96KB（96K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):1.8 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-LQFP 包裝:托盤 其它名稱:568-9587
ADUC7128BCPZ1262 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision Analog Microcontroller ARM7TDMI MCU with 12-Bit ADC and DDS DAC
ADUC7128BCPZ126-RL 功能描述:IC DAS MCU ARM7 ADC/DDS 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標(biāo)準(zhǔn)包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:4KB（4K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND
ADUC7128BCPZ126-RL2 制造商:AD 制造商全稱:Analog Devices 功能描述:Precision Analog Microcontroller ARM7TDMI MCU with 12-Bit ADC and DDS DAC
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*