參數(shù)資料
型號: ADUC7122BBCZ
廠商: Analog Devices Inc
文件頁數(shù): 50/96頁
文件大?。?/td> 0K
描述: IC ARM7TDMI MCU 126KB 108CSPBGA
特色產(chǎn)品: ADuC7122 Precision Analog Microcontroller
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 41.78MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 126KB(63K x 16)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x12b,D/A 12x12b
振蕩器型: 內(nèi)部
工作溫度: -10°C ~ 95°C
封裝/外殼: 108-LFBGA,CSPBGA
包裝: 托盤
ADuC7122
Rev. 0 | Page 54 of 96
UART SERIAL INTERFACE
The ADuC7122 features a 16450-compatible UART. The UART
is a full-duplex, universal, asynchronous receiver/transmitter. A
UART performs serial-to-parallel conversion on data characters
received from a peripheral device, and parallel-to-serial conver-
sion on data characters received from the ARM7TDMI. The
UART features a fractional divider that facilitates high accuracy
baud rate generation and a network addressable mode. The
UART functionality is available on the P1.0 and P1.1 pins of the
ADuC7122.
The serial communication adopts an asynchronous protocol
that supports various word length, stop bits, and parity genera-
tion options selectable in the configuration register.
BAUD RATE GENERATION
The ADuC7122 features two methods of generating the UART
baud rate: normal 450 UART baud rate generation and ADuC7122
fractional divider.
Normal 450 UART Baud Rate Generation
The baud rate is a divided version of the core clock using the
value in COMDIV0 and COMDIV1 MMRs (16-bit value, DL).
The standard baud rate generator formula is
DL
rate
Baud
2
16
MHz
78
.
41
(1)
Table 94 lists common baud rate values.
Table 94. Baud Rate Using the Standard Baud Rate Generator
Baud Rate
DL
Actual Baud Rate
% Error
9600
0x88
9600
0%
19,200
0x44
19,200
0%
115,200
0x0B
118,691
3%
ADuC7122 Fractional Divider
The fractional divider combined with the normal baud rate
generator allows the generating of a wider range of more
accurate baud rates.
/16DL
UART
FBEN
CORE
CLOCK
/2
/(M + N/2048)
0
87
55
-035
Figure 34. Baud Rate Generation Options
Calculation of the baud rate using fractional divider is as
follows:
)
2048
(
2
16
MHz
78
.
41
N
M
DL
Rate
Baud
(2)
2
16
MHz
78
.
41
2048
DL
Rate
Baud
N
M
For example, generation of 19,200 baud
2
67
16
200
,
19
MHz
78
.
41
2048
N
M
015
.
1
2048
N
M
where:
M = 1.
N = 0.015 × 2048 = 30.
2048
30
1
2
67
16
MHz
78
.
41
Rate
Baud
where Baud Rate = 19,219 bps.
UART REGISTER DEFINITION
The UART interface consists of the following ten registers:
COMTX: 8-bit transmit register
COMRX: 8-bit receive register
COMDIV0: divisor latch (low byte)
COMDIV1: divisor latch (high byte)
COMCON0: line control register
COMCON1: line control register
COMSTA0: line status register
COMIEN0: interrupt enable register
COMIID0: interrupt identification register
COMDIV2: 16-bit fractional baud divide register
COMTX, COMRX, and COMDIV0 share the same address
location. COMTX, COMRX, and COMIEN0 can be accessed
when Bit 7 in the COMCON0 register is cleared. COMDIVx
can be accessed when Bit 7 of COMCON0 is set
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