參數(shù)資料
型號(hào)： ADSP-BF547KBCZ-6A
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 600 MHz Blackfin Embedded Processor: ADSP-BF547KBCZ-6A Temp Range: 0°C to +70°C Package: 400-Ball CSP_BGA BC-400-1
中文描述： 16-BIT, 50 MHz, OTHER DSP, PBGA400
封裝： 17 X 17 MM, ROHS COMPLIANT, CSBGA-400
文件頁(yè)數(shù)： 37/100頁(yè)
文件大小： 3095K
代理商： ADSP-BF547KBCZ-6A
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Rev. D
|
Page 41 of 100
|
May 2011
TIMING SPECIFICATIONS
Timing specifications are detailed in this section.
Clock and Reset Timing
Table 24 and Figure 10 describe Clock Input and Reset Timing.
Table 25 and Figure 11 describe Clock Out Timing.
Table 24. Clock Input and Reset Timing
Parameter
Min
Max
Unit
Timing Requirements
tCKIN
CLKIN Period1, 2, 3, 4
20.0
100.0
ns
tCKINL
CLKIN Low Pulse2
8.0
ns
tCKINH
CLKIN High Pulse2
8.0
ns
tBUFDLAY
CLKIN to CLKBUF Delay
10
ns
tWRST
RESET Asserted Pulsewidth Low
5
11 tCKIN
ns
tRHWFT
RESET High to First HWAIT/HWAITA Transition (Boot Host Wait Mode)
6, 7, 8, 9 6100 t
CKIN + 7900 tSCLK
ns
tRHWFT
RESET High to First HWAIT/HWAITA Transition (Reset Output Mode)7, 10, 11
6100 tCKIN
7000 tCKIN
ns
1 Combinations of the CLKIN frequency and the PLL clock multiplier must not exceed the allowed f
VCO, fCCLK, and fSCLK settings discussed in Table 15 and Table 12 on Page 34.
2 Applies to PLL bypass mode and PLL non-bypass mode.
3 CLKIN frequency and duty cycle must not change on the fly.
4 If the DF bit in the PLL_CTL register is set, then the maximum t
CKIN period is 50 ns.
5 Applies after power-up sequence is complete. See Table 26 and Figure 12 for more information about power-up reset timing.
6 Maximum value not specified due to variation resulting from boot mode selection and OTP memory programming.
7 Values specified assume no invalidation preboot settings in OTP page PBS00L. Invalidating a PBS set will increase the value by 1875 t
CKIN (typically).
8 Applies only to boot modes BMODE=1, 2, 4, 6, 7, 10, 11, 14, 15.
9 Use default t
SCLK value unless PLL is reprogrammed during preboot. In case of PLL reprogramming use the new tSCLK value and add PLL_LOCKCNT settle time.
10When enabled by OTP_RESETOUT_HWAIT bit. If regular HWAIT is not required in an application, the OTP_RESETOUT_HWAIT bit in the same page instructs the
HWAIT or HWAITA to simulate reset output functionality. Then an external resistor is expected to pull the signal to the reset level, as the pin itself is in high performance
mode during reset.
11Variances are mainly dominated by PLL programming instructions in PBS00L page and boot code differences between silicon revisions. The earlier is bypassed in boot
mode BMODE = 0. Maximum value assumes PLL programming instructions do not cause the SCLK frequency to decrease.
Figure 10. Clock and Reset Timing
CLKIN
tWRST
tCKIN
tCKINL
tCKINH
tBUFDLAY
RESET
CLKBUF
HWAIT (A)
tRHWFT
相關(guān)PDF資料
PDF描述
ADSP-BF548MBBCZ-5M 533 MHz Blackfin Embedded Processor: ADSP-BF548MBBCZ-5M Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
ADSP-BF548BBCZ-5A 533 MHz Blackfin Embedded Processor: ADSP-BF548BBCZ-5A Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
ADSP-TS101SAB1-000 300 MHz TigerSHARC Processor with 6 Mbit on-chip SRAM; Package: 625 ball BGA; No of Pins: 625; Temperature Range: Ind
ADSP-TS101SAB2-000 300 MHz TigerSHARC Processor with 6 Mbit on-chip SRAM; Package: 484 ball BGA; No of Pins: 484; Temperature Range: Ind
ADSP-TS203SABP-050 500 MHz TigerSHARC Processor with 4 Mbit on-chip embedded DRAM; Package: 576 ball SBGA; No of Pins: 576; Temperature Range: Ind
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-BF547MBBCZ-5M 功能描述:IC DSP 16BIT 533MHZ MDDR 400CBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:Blackfin® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-BF547YBC-4A 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 400MHz Blackfin Embedded Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
ADSP-BF547YBCZ-4A 功能描述:IC DSP BLACKFIN 400MHZ 400CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:Blackfin® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤
ADSP-BF548BBCZ 制造商:Analog Devices 功能描述:
ADSP-BF548BBCZ-5A 功能描述:IC DSP 16BIT 533MHZ 400CSBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:Blackfin® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*