參數(shù)資料
型號: ADSP-21MOD980N
廠商: Analog Devices, Inc.
英文描述: MultiPort Internet Gateway Processor
中文描述: 通寶互聯(lián)網(wǎng)網(wǎng)關(guān)處理器
文件頁數(shù): 32/42頁
文件大?。?/td> 566K
代理商: ADSP-21MOD980N
32
6/2001
REV. PrB
For current information contact Analog Devices at (800) ANALOGD
ADSP-21mod980N
PRELIMINARY TECHNICAL DATA
IDMA Write, Long Write Cycle
Table 14. IDMA Write, Long Write Cycle
Parameter
Description
Min.
Max
Unit
Timing Requirements
t
IKW
IACK Low before Start of Write
1
0
ns
t
IKSU
IAD[15:0] Data Setup before End of Write
2, 3, 4
0.5t
CK
+ 5
ns
t
IKH
IAD[15:0] Data Hold after End of Write
2, 3, 4
0
ns
Switching Characteristics:
t
IKLW
Start of Write to IACK Low
4
1.5t
CK
ns
t
IKHW
Start of Write to IACK High
10
ns
1
Start of Write = IS Low and IWR Low.
2
If Write Pulse ends before IACK Low, use specifications t
IDSU
, t
IDH
.
3
If Write Pulse ends after IACK Low, use specifications t
IKSU
, t
IKH
.
4
This is the earliest time for IACK Low from Start of Write. For IDMA Write cycle relationships, please refer to the
ADSP-2100 Family User
s Manual
.
Figure 24. IDMA Write, Long Write Cycle
IAD 15-0
DATA
t
IKHW
t
IKW
IACK
IS
IW R
t
IKLW
t
IKH
t
IKSU
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