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參數資料
| 型號： | ADSP-2188MKSTZ-300 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 9/40頁 |
| 文件大小： | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 100LQFP |
| 標準包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 主機接口，串行端口 |
| 時鐘速率： | 75MHz |
| 非易失內存： | 外部 |
| 芯片上RAM： | 256kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 2.50V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應商設備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
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REV. 0
ADSP-2188M
–17–
In addition to the programmable flags, the ADSP-2188M has five
fixed-mode flags, FI, FO, FL0, FL1, and FL2. FL0–FL2 are
dedicated output flags. FI and FO are available as an alternate
configuration of SPORT1.
Note: Pins PF0, PF1, PF2, and PF3 are also used for device
configuration during reset.
Instruction Set Description
The ADSP-2188M assembly language instruction set has an
algebraic syntax that was designed for ease of coding and read-
ability. The assembly language, which takes full advantage of the
processor’s unique architecture, offers the following benefits:
The algebraic syntax eliminates the need to remember cryptic
assembler mnemonics. For example, a typical arithmetic add
instruction, such as AR = AX0 + AY0, resembles a simple
equation.
Every instruction assembles into a single, 24-bit word that
can execute in a single instruction cycle.
The syntax is a superset ADSP-2100 Family assembly lan-
guage and is completely source and object code compatible
with other family members. Programs may need to be relocated
to utilize on-chip memory and conform to the ADSP-2188M’s
interrupt vector and reset vector map.
Sixteen condition codes are available. For conditional jump,
call, return, or arithmetic instructions, the condition can
be checked and the operation executed in the same instruc-
tion cycle.
Multifunction instructions allow parallel execution of an
arithmetic instruction with up to two fetches or one write to
processor memory space during a single instruction cycle.
DESIGNING AN EZ-ICE-COMPATIBLE SYSTEM
The ADSP-2188M has on-chip emulation support and an
ICE-Port, a special set of pins that interface to the EZ-ICE.
These features allow in-circuit emulation without replacing the
target system processor by using only a 14-pin connection from
the target system to the EZ-ICE. Target systems must have a
14-pin connector to accept the EZ-ICE’s in-circuit probe, a
14-pin plug.
Issuing the chip reset command during emulation causes the
DSP to perform a full chip reset, including a reset of its memory
mode. Therefore, it is vital that the mode pins are set correctly
PRIOR to issuing a chip reset command from the emulator user
interface. If a passive method of maintaining mode information is
being used (as discussed in Setting Memory Modes), it does not
matter that the mode information is latched by an emulator
reset. However, if the
RESET pin is being used as a method of
setting the value of the mode pins, the effects of an emulator
reset must be taken into consideration.
One method of ensuring that the values located on the mode
pins are those desired is to construct a circuit like the one shown
in Figure 12. This circuit forces the value located on the Mode
A pin to logic high; regardless of whether it is latched via the
RESET or ERESET pin.
PROGRAMMABLE I/O
MODE A/PFO
RESET
ERESET
1k
ADSP-2188M
Figure 12. Mode A Pin/EZ-ICE Circuit
See the ADSP-2100 Family EZ-Tools data sheet for complete
information on ICE products.
The ICE-Port interface consists of the following ADSP-2188M
pins:
EBR, EINT, EE, EBG, ECLK, ERESET, ELIN, EMS,
and ELOUT
These ADSP-2188M pins must be connected only to the EZ-ICE
connector in the target system. These pins have no function except
during emulation, and do not require pull-up or pull-down
resistors. The traces for these signals between the ADSP-2188M
and the connector must be kept as short as possible, no longer
than 3 inches.
The following pins are also used by the EZ-ICE:
BR, BG,
RESET, and GND.
The EZ-ICE uses the EE (emulator enable) signal to take con-
trol of the ADSP-2185M in the target system. This causes the
processor to use its
ERESET, EBR, and EBG pins instead of
the
RESET, BR, and BG pins. The BG output is three-stated.
These signals do not need to be jumper-isolated in your system.
The EZ-ICE connects to your target system via a ribbon cable
and a 14-pin female plug. The female plug is plugged onto the
14-pin connector (a pin strip header) on the target board.
Target Board Connector for EZ-ICE Probe
The EZ-ICE connector (a standard pin strip header) is shown in
Figure 13. You must add this connector to your target board
design if you intend to use the EZ-ICE. Be sure to allow enough
room in your system to fit the EZ-ICE probe onto the 14-pin
connector.
1
2
3
4
56
78
910
11
12
13
14
GND
KEY (NO PIN)
RESET
BR
BG
TOP VIEW
EBG
EBR
ELOUT
EE
EINT
ELIN
ECLK
EMS
ERESET
Figure 13. Target Board Connector for EZ-ICE
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| ADSP-2188NBSTZ-320 | 功能描述:IC DSP CONTROLLER 16BIT 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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