參數(shù)資料
型號(hào): ADSP-2187LBST-210
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: DSP Microcomputer
中文描述: 24-BIT, 26.3 MHz, OTHER DSP, PQFP100
封裝: MS-026BED, LQFP-100
文件頁(yè)數(shù): 9/32頁(yè)
文件大?。?/td> 223K
代理商: ADSP-2187LBST-210
ADSP-2187L
–9–
REV. 0
ACCESSIBLE WHEN
PMOVLAY = 2
ACCESSIBLE WHEN
PMOVLAY = 1
ACCESSIBLE WHEN
PMOVLAY = 5
ALWAYS
ACCESSIBLE
AT ADDRESS
0
3
0000 – 0
3
1FFF
ACCESSIBLE WHEN
PMOVLAY = 0
ACCESSIBLE WHEN
PMOVLAY = 4
INTERNAL
MEMORY
EXTERNAL
MEMORY
0
3
2000–
0
3
3FFF
0
3
2000–
0
3
3FFF
0
3
2000–
0
3
3FFF
0
3
2000–
0
3
3FFF
2
0
3
2000–
0
3
3FFF
2
PM (MODE B = 0)
8K INTERNAL
PMOVLAY = 0
8K EXTERNAL
PROGRAM MEMORY
MODE B = 1
ADDRESS
0
3
3FFF
0
3
2000
0
3
1FFF
0
3
0000
8K INTERNAL
PMOVLAY = 0, 4, 5
OR
8K EXTERNAL
PMOVLAY = 1, 2
0
3
3FFF
0
3
2000
0
3
1FFF
8K INTERNAL
0
3
0000
PROGRAM MEMORY
MODE B = 0
ADDRESS
ACCESSIBLE WHEN
PMOVLAY = 1
RESERVED
RESERVED
INTERNAL
MEMORY
EXTERNAL
MEMORY
0
3
2000–
0
3
3FFF
0
3
0000–
0
3
1FFF
2
PM (MODE B = 1)
1
RESERVED
1
WHEN MODE B = 1, PMOVLAY MUST BE SET TO 0
2
SEE TABLE III FOR PMOVLAY BITS
ACCESSIBLE WHEN
PMOVLAY = 0
RESERVED
Figure 4. Program Memory
Program Memory (Host Mode)
allows access to all internal
memory. External overlay access is limited by a single external
address line (A0). External program execution is not available
in host mode due to a restricted data bus that is 16-bits wide
only.
Table III. PMOVLAY Bits
PMOVLAY Memory
A13
A12:0
0, 4, 5
1
Internal
External
Overlay 1
Not Applicable
0
Not Applicable
13 LSBs of Address
Between 0x2000
and 0x3FFF
13 LSBs of Address
Between 0x2000
and 0x3FFF
2
External
Overlay 2
1
DATA MEMORY
Data Memory (Full Memory Mode)
is a 16-bit-wide space
used for the storage of data variables and for memory-mapped
control registers. The ADSP-2187L has 32K words on Data
Memory RAM on chip, consisting of 16,352 user-accessible lo-
cations and 32 memory-mapped registers. Support also exists
for up to two 8K external memory overlay spaces through the
external data bus. All internal accesses complete in one cycle.
Accesses to external memory are timed using the wait states
specified by the DWAIT register.
ACCESSIBLE WHEN
ACCESSIBLE WHEN
ACCESSIBLE WHEN
3MAPPED
REGISTERS
0
3
3FFF
0
3
2000
0
3
1FFF
IN8160
WORDS
0
3
0000
DATA MEMORY
ADDRESS
2000 – 0
0
3
3
3FFF
ACDMOVLAY = 0
ACCESSIBLE WHEN
INTERNAL
EXTERNAL
0
3
0
3
2000–
0
3
0
3
0000–
0
3
0
3
0000–
0
3
0
3
0000–
0
3
0
3
0000–
DATA MEMORY
D8K INOR
EXTERNAL 8K
0
3
3FE0
0
3
3FDF
Figure 5. Data Memory Map
Data Memory (Host Mode) allows access to all internal memory.
External overlay access is limited by a single external address line
(A0). The DMOVLAY bits are defined in Table IV.
Table IV. DMOVLAY Bits
DMOVLAY
Memory
A13
A12:0
0, 4, 5
1
Internal
External
Overlay 1
Not Applicable
0
Not Applicable
13 LSBs of Address
Between 0x2000
and 0x3FFF
13 LSBs of Address
Between 0x2000
and 0x3FFF
2
External
Overlay 2
1
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