參數(shù)資料
型號(hào)： ADSP-2184BSTZ-160
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 3/31頁(yè)
文件大?。?/td> 0K
描述： IC DSP CONTROLLER 16BIT 100LQFP
標(biāo)準(zhǔn)包裝： 1
系列： ADSP-21xx
類(lèi)型： 定點(diǎn)
接口： 主機(jī)接口，串行端口
時(shí)鐘速率： 40MHz
非易失內(nèi)存： 外部
芯片上RAM： 20kB
電壓 - 輸入/輸出： 5.00V
電壓 - 核心： 5.00V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 738 (CN2011-ZH PDF)
ADSP-2184
–11–
REV. 0
In addition to the programmable flags, the ADSP-2184 has five
fixed-mode flags, FLAG_IN, FLAG_OUT, FL0, FL1 and
FL2. FL0-FL2 are dedicated output flags. FLAG_IN and
FLAG_OUT are available as an alternate configuration of
SPORT1.
Note: Pins PF0, PF1 and PF2 are also used for device configu-
ration during reset.
INSTRUCTION SET DESCRIPTION
The ADSP-2184 assembly language instruction set has an alge-
braic syntax that was designed for ease of coding and readabil-
ity. The assembly language, which takes full advantage of the
processor’s unique architecture, offers the following benefits:
The algebraic syntax eliminates the need to remember cryptic
assembler mnemonics. For example, a typical arithmetic add
instruction, such as AR = AX0 + AY0, resembles a simple
equation.
Every instruction assembles into a single, 24-bit word that
can execute in a single instruction cycle.
The syntax is a superset ADSP-2100 Family assembly lan-
guage and is completely source and object code compatible
with other family members. Programs may need to be relo-
cated to utilize on-chip memory and conform to the ADSP-
2184’s interrupt vector and reset vector map.
Sixteen condition codes are available. For conditional jump,
call, return or arithmetic instructions, the condition can be
checked and the operation executed in the same instruction
cycle.
Multifunction instructions allow parallel execution of an
arithmetic instruction with up to two fetches or one write to
processor memory space during a single instruction cycle.
DESIGNING AN EZ-ICE-COMPATIBLE SYSTEM
The ADSP-2184 has on-chip emulation support and an
ICE-Port, a special set of pins that interface to the EZ-ICE. These
features allow in-circuit emulation without replacing the target
system processor by using only a 14-pin connection from the
target system to the EZ-ICE. Target systems must have a 14-pin
connector to accept the EZ-ICE’s in-circuit probe, a 14-pin plug.
Issuing the chip reset command during emulation causes the
DSP to perform a full chip reset, including a reset of its memory
mode. Therefore, it is vital that the mode pins are set correctly
PRIOR to issuing a chip reset command from the emulator user
interface.
If using a passive method of maintaining mode information (as
discussed in Setting Memory Modes), it does not matter that
the mode information is latched by an emulator reset. However,
if using the
RESET pin as a method of setting the value of the
mode pins, the effects of an emulator reset must be taken into
consideration.
One method of ensuring that the values located on the mode
pins is the one that is desired to construct a circuit like the one
shown in Figure 7. This circuit will force the value located on
the Mode A pin to Logic Low, regardless if it latched via the
RESET or ERESET pin.
PROGRAMMABLE I/O
MODE A/PFO
RESET
ERESET
1k
ADSP-2184
Figure 7.
See the ADSP-2100 Family EZ-Tools data sheet for complete
information on ICE products.
The ICE-Port interface consists of the following ADSP-2184
pins:
EBR
EBG
ERESET
EMS
EINT
ECLK
ELIN
ELOUT
EE
These ADSP-2184 pins must be connected only to the EZ-ICE
connector in the target system. These pins have no function
except during emulation, and do not require pull-up or
pull-down resistors. The traces for these signals between the
ADSP-2184 and the connector must be kept as short as pos-
sible, no longer than three inches.
The following pins are also used by the EZ-ICE:
BR
BG
RESET
GND
The EZ-ICE uses the EE (emulator enable) signal to take con-
trol of the ADSP-2184 in the target system. This causes the
processor to use its
ERESET, EBR and EBG pins instead of
the
RESET, BR and BG pins. The BG output is three-stated.
These signals do not need to be jumper-isolated in your system.
The EZ-ICE connects to your target system via a ribbon cable
and a 14-pin female plug. The female plug is plugged onto the
14-pin connector (a pin strip header) on the target board.
Target Board Connector for EZ-ICE Probe
The EZ-ICE connector (a standard pin strip header) is shown in
Figure 8. You must add this connector to your target board
design if you intend to use the EZ-ICE. Be sure to allow enough
room in your system to fit the EZ-ICE probe onto the 14-pin
connector.
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