參數(shù)資料
型號： ADSP-21364SBBC-ENG
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號處理
英文描述： SHARC Processor
中文描述： 16-BIT, 55.55 MHz, OTHER DSP, PBGA136
封裝： MO-205AE, MBGA-136
文件頁數(shù)： 36/52頁
文件大?。?/td> 853K
代理商： ADSP-21364SBBC-ENG
Rev. PrB
|
Page 36 of 52
|
September 2004
ADSP-21364
Preliminary Technical Data
SPDIF Transmitter
Serial data input to the SPDIF transmitter can be formatted as
left justified, I
2
S or right justified with word widths of 16, 18, 20,
or 24 bits. The following sections provide timing for the
transmitter.
SPDIF Transmitter—Serial Input Waveforms
Figure 27
shows the right-justified mode. LRCLK is HI for the
left channel and LO for the right channel. Data is valid on the
rising edge of SCLK. The MSB is delayed 12-bit clock periods
(in 20-bit output mode) or 16-bit clock periods (in 16-bit output
mode) from an LRCLK transition, so that when there are 64
SCLK periods per LRCLK period, the LSB of the data will be
right-justified to the next LRCLK transition.
Figure 28
shows the default I2S-justified mode. LRCLK is LO
for the left channel and HI for the right channel. Data is valid on
the rising edge of SCLK. The MSB is left-justified to an LRCLK
transition but with a single SCLK period delay.
Figure 29
shows the left-justified mode. LRCLK is HI for the left
channel and LO for the right channel. Data is valid on the rising
edge of SCLK. The MSB is left-justified to an LRCLK transition
with no MSB delay.
Figure 27. Right-Justified Mode
LRCLK
SCLK
SDATA
LEFT CHANNEL
RIGHT CHANNEL
MSB-1
MSB-2
LSB+2 LSB+1
LSB
MSB
MSB-1
MSB-2
LSB+2
LSB+1
LSB
LSB
MSB
Figure 28. I
2
S-Justified Mode
MSB-1
MSB-2
LSB+2 LSB+1
LSB
LRCLK
SCLK
SDATA
LEFTCHANNEL
RIGHTCHANNEL
MSB
MSB-1
MSB-2
LSB+2
LSB+1
LSB
MSB
MSB
Figure 29. Left-Justified Mode
LRCLK
SCLK
SDATA
LEFT CHANNEL
RIGHT CHANNEL
MSB-1
MSB-2
LSB+2
LSB+1
LSB
MSB
MSB-1
MSB-2
LSB+2
LSB+1
LSB
MSB
MSB+1
MSB
相關(guān)PDF資料
PDF描述
ADSP-21364SBBCZENG SHARC Processor
ADSP-21364SBSQ-ENG SHARC Processor
ADSP-21364SBSQZENG SHARC Processor
ADSP-21364SCSQ-ENG SHARC Processor
ADSP-21364SCSQZENG SHARC Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21364SBBCZENG 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
ADSP-21364SBSQ-ENG 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
ADSP-21364SBSQZENG 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
ADSP-21364SCSQ-ENG 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
ADSP-21364SCSQZENG 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
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