參數資料
型號： ADSP-21161NKCA-100
廠商： ANALOG DEVICES INC
元件分類： 數字信號處理
英文描述： DSP Microcomputer
中文描述： 48-BIT, 27.5 MHz, OTHER DSP, PBGA225
封裝： 17 X 17 MM, MO-192AAF-2, BGA-225
文件頁數： 24/60頁
文件大小： 1019K
代理商： ADSP-21161NKCA-100
ADSP-21161N
–24–
REV. A
protection circuitry. With this technique, if the 1.8 V rail rises
ahead of the 3.3 V rail, the Schottky diode pulls the 3.3 V rail
along with the 1.8 V rail.
Clock Input
In systems that use multiprocessing or SBSRAM,
CLKDBL
cannot be enabled nor can the systems use an external crystal as
the CLKIN source.
Do not use CLKOUT as the clock source for the SBSRAM
device. Using an external crystal in conjunction with
CLKDBL
to generate a CLKOUT frequency is not supported. Negative
hold times can result from the potential skew between CLKIN
and CLKOUT.
Clock Signals
The ADSP-21161N can use an external clock or a crystal. See
CLKIN pin description. The programmer can configure the
ADSP-21161N to use its internal clock generator by connecting
the necessary components to CLKIN and XTAL.
Figure 15
shows the component connections used for a crystal operating in
fundamental mode.
Figure 13. Dual Voltage Schottky Diode
3.3V I/O
VOLTAGE
REGULATOR
1.8V CORE
VOLTAGE
REGULATOR
V
DDEXT
ADSP-21161N
V
DDINT
DC INPUT
SOURCE
Table 10. Clock Input
Parameter
Timing Requirements
t
CK
t
CKL
t
CKH
t
CKRF
t
CCLK
100 MHz
Unit
Min
Max
CLKIN Period
1
CLKIN Width Low
1
CLKIN Width High
1
CLKIN Rise/Fall (0.4 V–2.0 V)
CCLK Period
20
7.5
7.5
238
119
119
3
30
ns
ns
ns
ns
ns
10
Switching Characteristics
t
DCKOO
t
CKOP
t
CKWH
t
CKWL
CLKOUT Delay After CLKIN
CLKOUT Period
CLKOUT Width High
CLKOUT Width Low
0
t
CKOP
–1
t
CKOP
/2–2
t
CKOP
/2–2
2
t
CKOP
+1
t
CKOP
/2+2
t
CKOP
/2+2
ns
ns
ns
ns
1
CLKIN is dependent on the configuration of the CLKCFGx and
CLKDBL
pins to achieve desired t
CCLK
.
Figure 14. Clock Input
CLKIN
t
CKH
t
CK
t
CKL
CLKOUT
t
DCKOO1
t
CKOP1
t
CKWL1
t
CKWH1
CLKOUT
NOTES:
1. WHEN
CLKDBL
IS DISABLED, ANY SPECIFICATION TO CLKIN
APPLIES TO THE RISING EDGE, ONLY.
2. WHEN
CLKDBL
IS ENABLED, ANY SPECIFICATION TO CLKIN
APPLIES TO THE RISING OR FALLING EDGE.
t
DCKOO2
t
CKOP2
t
DCKOO2
t
CKWH2
t
CKWL2
Figure 15. 100 MHz Operation (Fundamental Mode
Crystal)
CLKIN
XTAL
C2
27pF
C1
27pF
X1
SUGGESTED COMPONENTS FOR 100MHz OPERATION:
ECLIPTEK EC2SM-25.000M (SURFACE MOUNT PACKAGE)
ECLIPTEK EC-25.000M (THROUGH-HOLE PACKAGE)
C1 = 27pF
C2 = 27pF
NOTE: C1 AND C2 ARE SPECIFIC TO CRYSTAL SPECIFIED FOR X1.
CONTACT CRYSTAL MANUFACTURER FOR DETAILS. THIS 25MHz
CRYSTAL GENERATES A 100MHz CCLK AND A 50MHz EP CLOCK
WITH
CLKDBL
ENABLED AND A 2:1 PLL MULTIPLY RATIO.
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相關代理商/技術參數
參數描述
ADSP-21161NKCA-100Z 制造商:Analog Devices 功能描述:
ADSP-21161NKCAZ100 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤
ADSP-21161NYCAZ110 功能描述:IC DSP CONTROLLER 32BIT 225BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤
ADSP-21261 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Embedded Processor
ADSP-21261SKBC-150 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 150MHz 150MIPS 136-Pin CSP-BGA 制造商:Rochester Electronics LLC 功能描述:150 MHZ, 32BIT DSP PROCESSOR. - Bulk
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