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參數(shù)資料
| 型號： | ADSP-1981BL |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | Codec |
| 英文描述： | AC 97 SoundMAX Codec |
| 中文描述： | 交流97 SoundMAX編解碼器 |
| 文件頁數(shù)： | 30/32頁 |
| 文件大小： | 326K |
| 代理商： | ADSP-1981BL |
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AD1981BL
Bit
VREFD
Rev. A | Page 30 of 32
Mnemonic
V
REFOUT
Disable
Function
This bit disables V
REFOUT
, placing it into high Z out mode. This bit overrides the VREFH bit selection.
0 = V
REFOUT
pin is driven by the internal reference (reset default).
1 = V
REFOUT
pin is placed into high Z out mode.
0 = V
REFOUT
pin is set to 2.25 V output (reset default).
1 = V
REFOUT
pin is set to 2.25 V output (is set to 3.7 V only if AVDD = 5 V).
This bit indicates status of the mixer digitizing ADC (left and right channels).
0 = Mixer ADC not ready.
1 = Mixer ADC ready.
This bit enables simultaneous recording from MIC1 and MIC2 inputs for applications that use a
stereo microphone array. This register works in conjunction with the MS bit in Register 0x20.
0 = MIC1 or MIC2 (determined by the MS bit) is routed to the record selector’s left and right MIC
channels, as well as to the mixer (reset default).
1 = MIC1 is routed to the record selector’s left MIC channel and MIC2 is routed to the record
selector’s right MIC channel. In this mode, the MS bit should be set low, and MIC1 can still be
enabled into the mixer.
This bit controls power-down for mixer digitizing ADC.
0 = Mixer ADC is powered on (default).
1 = Mixer ADC is powered down.
This bit controls the front (main) DAC to mixer mute switches.
0 = Front DAC outputs are allowed to sum into the mixer (reset default).
1 = Front DAC outputs are muted into the mixer (blocked).
PCM DAC outputs bypass the analog mixer and are sent directly to the codec output.
This bit disables the LINE_OUT pins (L/R), placing them into high Z mode so that the assigned
output audio jack can be shared for the input function (or other function).
0 = LINE_OUT pins have normal audio drive capability (reset default).
1 = LINE_OUT pins are placed into high Z mode.
This bit allows separate mute control bits for the master, headphone, LINE_IN, CD, AUX, and PCM
volume control registers as well as for the record gain register.
0 = Both left- and right-channel mutes are controlled by Bit 15 in the respective registers (reset
default).
1 = Bit 15 affects only the left-channel mute, and Bit 7 affects only the right-channel mute.
This bit determines DAC data fill under starved conditions.
0 = DAC data is repeated when DACs are starved for data (reset default).
1 = DAC is zero-filled when DACs are starved for data.
VREFH
V
REFOUT
High
MADST
Mixer ADC Status Bit
2CMIC
2-Channel MIC Select
MADPD
Mixer ADC Power-Down
FMXE
Front DAC into Mixer
Enable
DAM
LODIS
Digital Audio Mode
LINE_OUT Disable
MSPLT
Mute Split
DACZ
DAC Zero-Fill
相關(guān)PDF資料 |
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|---|---|
| AD1981BL | AC ’97 SoundMAX㈢ Codec |
| AD1981BLJSTZ2 | AC ’97 SoundMAX㈢ Codec |
| AD1981BLJSTZ-REEL2 | AC ’97 SoundMAX㈢ Codec |
| AD1981HD | HD Audio SoundMAX Codec |
| AD1981HDJSTZ | HD Audio SoundMAX Codec |
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