參數(shù)資料
型號(hào): ADS807E
英文描述: 12-Bit, 53MHz Sampling ANALOG-TO-DIGITAL CONVERTER
中文描述: 12位,53MHz采樣模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 3/15頁
文件大?。?/td> 225K
代理商: ADS807E
3
ADS807
SPECIFICATIONS
At T
A
= full specified temperature range, V
S
= +5V, differential input range = 2V to 3V for each input, sampling rate = 50MHz, unless otherwise noted.
ADS807E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility
for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights
or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life
support devices and/or systems.
CMOS
Straight Offset Binary
DIGITAL OUTPUTS
Logic Family
Logic Coding
Low Output Voltage (I
OL
= 50
μ
A)
Low Output Voltage, (I
OL
= 1.6mA)
High Output Voltage, (I
OH
= 50
μ
A)
High Output Voltage, (I
OH
= 0.5mA)
Low Output Voltage, (I
OL
= 50
μ
A)
High Output Voltage, (I
OH
= 50
μ
A)
3-State Enable Time
3-State Disable Time
Output Capacitance
VDRV = 5V
VDRV = 5V
VDRV = 5V
VDRV = 5V
VDRV = 3V
VDRV = 3V
OE = L
(5)
OE = H
(5)
+0.1
+0.2
V
V
V
V
V
V
ns
ns
pF
+4.9
+4.8
+0.1
+2.8
20
2
5
40
10
ACCURACY (Internal Reference, 2Vp-p, Unless Otherwise Noted)
Zero Error (Referred to –FS)
Zero Error Drift (Referred to –FS)
Gain Error
(6)
Gain Error Drift
(6)
Gain Error
(7)
Gain Error Drift
(7)
Power Supply Rejection of Gain
REFT Tolerance
2V Full Scale
3V Full Scale
REFB Tolerance
2V Full Scale
3V Full Scale
External REFT Voltage Range
External REFB Voltage Range
Reference Input Resistance
at 25
°
C
±
1.0
16
±
1.5
66
±
1.0
23
70
±
2.0
%FS
ppm/
°
C
%FS
ppm/
°
C
%FS
ppm/
°
C
dB
at 25
°
C
±
2.5
at 25
°
C
±
1.5
V
S
=
±
5%
50
Deviation From Ideal 3.0V
Deviation From Ideal 3.25V
±
10
±
20
±
65
±
100
mV
mV
Deviation From Ideal 2.0V
Deviation From Ideal 1.75V
±
10
±
20
3
2
1
±
65
±
100
V
S
– 1.70
REFT – 0.4
mV
mV
V
V
k
REFB + 0.4
1.70
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Supply Current: +I
S
Power Dissipation: VDRV = 5V
Operating
Operating
External Reference
External Reference
Internal Reference
Internal Reference
+4.75
+5.0
60
305
290
350
335
+5.25
V
mA
mW
mW
mW
mW
360
350
390
380
VDRV = 3V
VDRV = 5V
VDRV = 3V
Thermal Resistance,
θ
JA
28-Lead SSOP
50
°
C/W
NOTES: (1) Spurious Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to Full Scale. (3) Two-tone intermodulation
distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the two-tone fundamental envelope.
(4) Effective number of bits (ENOB) is defined by as (SINAD – 1.76)/6.02. (5) A 50k
pull-down resistor is inserted internally on OE pin. (6) Includes internal reference.
(7) Excludes internal reference.
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