參數(shù)資料
型號(hào): ADS7818PG4
廠商: Texas Instruments
文件頁(yè)數(shù): 2/21頁(yè)
文件大?。?/td> 0K
描述: IC 12BIT 500KHZ ADC CONV 8-DIP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 50
位數(shù): 12
采樣率(每秒): 500k
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 20mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
輸入數(shù)目和類(lèi)型: 1 個(gè)差分,單極
配用: 296-19913-ND - EVAL MOD FOR ADS7818
10
ADS7818
D11
(MSB)
DATA
HOLD
SAMPLE
HOLD
CLK
CONV
SAMPLE/HOLD
MODE
POWER MODE
FULL POWER
LOW POWER
D10
D1
D0
(LSB)
t
CKPD
t
CVPU
t
CVSP
12
3
12
13
t
ACQ
CONVERSION IN PROGRESS
IDLE
INTERNAL
CONVERSION
STATE
NOTES: (1) The low power mode (“power-down”) is entered when CONV remains LOW during the conversion and is still LOW at the
start of the 13th clock cycle. (2) The low power mode is exited when CONV goes HIGH. (3) When in power-down, the transition from
hold mode to sample mode is initiated by CONV going HIGH.
(1)
(2)
(3)
FIGURE 4. Power-down Timing.
D11
(MSB)
DATA
CONVERSION IN PROGRESS
IDLE
LOW...
IDLE
CLK
CONV
POWER MODE
FULL POWER
LOW POWER
D10
D1
D0
(LSB)
1
2
3
1213
14
2324
D1
D10
D11
(MSB)
INTERNAL
CONVERSION
STATE
t
CVDD
t
CKCS
t
CKCH
t
CVPD
t
CVH
HOLD
SAMPLE
SAMPLE/HOLD
MODE
NOTES: (1) The serial data can be transmitted LSB first by pulling CONV LOW during the 13th clock cycle. (2) After the MSB has been
transmitted, the DATA output pin will remain LOW until CONV goes HIGH. (3) When CONV is taken LOW to initiate the LSB first transfer,
the converter enters the power-down mode.
(1)
(2)
(3)
FIGURE 5. Serial Data “LSB-First” Timing.
In contrast, the second method (clocking at a fixed rate)
means that each conversion takes X clock cycles. As the
time between conversions get longer, the converter remains
in power-down an increasing percentage of time. This re-
duces total power consumption by a considerable amount.
For example, a 50kHz conversion rate results in roughly
1/10 of the power (minus the reference) that is used at a
500kHz conversion rate.
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