參數(shù)資料
型號(hào): ADS1259BIPWR
廠商: Texas Instruments
文件頁(yè)數(shù): 20/48頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT SPI 14KSPS 20TSSOP
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 24
采樣率(每秒): 14k
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)單端,單極;2 個(gè)單端,雙極;1 個(gè)差分,單極;1 個(gè)差分,雙極
DRDY
CS
(DOUTwith
=0)
DIN
t
CAL
CALCommand
Calibrationcomplete
andfirstdataready.
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
CALIBRATION
The internal full-scale calibration word is bypassed
during offset calibration. Do not exceed +105% of
The ADS1259 has commands to correct for system
full-scale range for gain calibration. Note that the
offset and gain errors. Calibration can be performed
out-of-range
threshold
is
unaffected
by
gain
at any time the ADS1259 and associated circuitry
calibration.
(such as the input amplifier, external reference, power
supplies,
etc)
have
stabilized.
Options
include
Table 15. Calibration Timing
calibrating after power-up, after temperature changes,
tCAL CALIBRATION TIME (ms)
or calibration at regular intervals. To calibrate:
DATA RATE
(SPS)
sinc1
sinc2
Set the gate control mode (PULSE bit = 0)
14400
1.89
2.19
Start the ADS1259 conversions
3600
5.43
6.15
Apply the appropriate input to the ADS1259 (zero
or full-scale)
1200
14.9
16.7
Allow time for the input to completely settle
400
43.2
48.4
60
284
318
Send the OFSCAL (offset calibration) or GANCAL
(full-scale calibration) command, as appropriate
50
341
380
Wait for calibration to complete as given by the
16.6
1020
1140
time listed in Table 15. DRDY goes low when
10
1700
1900
calibration is complete. The conversion result at
1. fCLK = 7.3728MHz.
this time uses the new offset or full-scale
calibration words.
shows
the
calibration
timing.
During
calibration, do not send commands.
Perform offset calibration prior to the gain calibration.
Figure 56. Calibration Timing
Copyright
2009–2011, Texas Instruments Incorporated
27
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