參數(shù)資料
型號(hào): ADS1251
廠商: Texas Instruments, Inc.
英文描述: "ResolutionPlus 24-Bit
中文描述: ResolutionPlus 24 位 20kHz 低功耗模數(shù)轉(zhuǎn)換器
文件頁數(shù): 11/17頁
文件大?。?/td> 323K
代理商: ADS1251
ADS1251
3
SBAS184A
www.ti.com
ELECTRICAL CHARACTERISTICS (Cont.)
All specifications at TMIN to TMAX, VDD = +5V, CLK = 8MHz, and VREF = 4.096, unless otherwise specified.
ADS1251U
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOLTAGE REFERENCE
VREF
0.5
4.096
VDD
V
Load Current
32
A
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
Logic Level: VIH
+4.0
+VDD + 0.3
V
VIL
–0.3
+0.8
V
VOH
IOH = –500A
+4.5
V
VOL
IOL = 500A
0.4
V
Input (SCLK, CLK) Hysteresis
0.6
V
Data Format
Offset Binary Two’s Complement
POWER-SUPPLY REQUIREMENTS
Operation
+4.75
+5
+5.25
VDC
Quiescent Current
VDD = +5VDC
1.5
2
mA
Operating Power
7.5
10
mW
Power-Down Current
0.4
1
A
TEMPERATURE RANGE
Operating
–40
+85
°C
Storage
–60
+100
°C
PIN CONFIGURATION
Top View
SO
PIN DESCRIPTIONS
PIN
NAME
PIN DESCRIPTION
1+VIN
Analog Input: Positive Input of the Differen-
tial Analog Input
2–VIN
Analog Input: Negative Input of the Differ-
ential Analog Input.
3+VDD
Input: Power-Supply Voltage, +5V
4
CLK
Digital Input: Device System Clock. The
system clock is in the form of a CMOS-
compatible clock. This is a Schmitt-Trigger
input.
5
DOUT/DRDY
Digital Output: Serial Data Output/Data
Ready. This output indicates that a new
output word is available from the ADS1251
data output register. The serial data is
clocked out of the serial data output shift
register using SCLK.
6
SCLK
Digital Input: Serial Clock. The serial clock
is in the form of a CMOS-compatible clock.
The serial clock operates independently
from the system clock, therefore, it is pos-
sible to run SCLK at a higher frequency
than CLK. The normal state of SCLK is
LOW. Holding SCLK HIGH will either ini-
tiate a modulator reset for synchronizing
multiple converters or enter power-down
mode. This is a Schmitt-Trigger input.
7
GND
Input: Ground
8VREF
Analog Input: Reference Voltage Input
+V
IN
ADS1251U
GND
–V
IN
V
REF
+V
DD
SCLK
DOUT/DRDY
CLK
1
2
3
4
8
7
6
5
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