參數(shù)資料
型號: ADS1191IPBS
廠商: Texas Instruments
文件頁數(shù): 37/67頁
文件大?。?/td> 0K
描述: IC AFE 16BIT 8KSPS 1CH 32TQFP
標(biāo)準包裝: 250
位數(shù): 16
通道數(shù): 1
電壓 - 電源,模擬: 2.7 V ~ 5.25 V
電壓 - 電源,數(shù)字: 1.7 V ~ 3.6 V
封裝/外殼: 32-TQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(5x5)
包裝: 管件
SBAS566A – DECEMBER 2011 – REVISED SEPTEMBER 2012
RLD_SENS: Right Leg Drive Sense Selection
Address = 06h
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RLD_LOFF_
0
PDB_RLD
RLD2N
RLD2P
RLD1N
RLD1P
SENS
This register controls the selection of the positive and negative signals from each channel for right leg drive
derivation. See the Right Leg Drive (RLD DC Bias Circuit) subsection of the ECG-Specific Functions section for
details.
Bits[7:6]
Must be set to '0'
Bit 5
PDB_RLD: RLD buffer power
This bit determines the RLD buffer power state.
0 = RLD buffer is powered down (default)
1 = RLD buffer is enabled
Bit 4
RLD_LOFF_SENSE: RLD lead-off sense function
This bit enables the RLD lead-off sense function.
0 = RLD lead-off sense is disabled (default)
1 = RLD lead-off sense is enabled
Bit 3
RLD2N: Channel 2 RLD negative inputs
This bit controls the selection of negative inputs from channel 2 for right leg drive derivation.
0 = Not connected (default)
1 = RLD connected to IN2N
Bit 2
RLD2P: Channel 2 RLD positive inputs
This bit controls the selection of positive inputs from channel 2 for right leg drive derivation.
0 = Not connected (default)
1 = RLD connected to IN2P
Bit 1
RLD1N: Channel 1 RLD negative inputs
This bit controls the selection of negative inputs from channel 1 for right leg drive derivation.
0 = Not connected (default)
1 = RLD connected to IN1N
Bit 0
RLD1P: Channel 1 RLD positive inputs
This bit controls the selection of positive inputs from channel 1 for right leg drive derivation.
0 = Not connected (default)
1 = RLD connected to IN1P
42
Copyright 2011–2012, Texas Instruments Incorporated
Product Folder Links: ADS1191 ADS1192
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