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參數(shù)資料
| 型號(hào)： | ADP5024ACPZ-1-R7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, PQCC24 |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, MO-220, LCC-24 |
| 文件頁數(shù)： | 1/27頁 |
| 文件大小： | 926K |
| 代理商： | ADP5024ACPZ-1-R7 |
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Dual 3 MHz, 1200 mA Buck
Regulators with One 300 mA LDO
Preliminary Technical Data
ADP5024
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or
other rights ofthirdpartiesthatmay result from its use. Specifications subject to change without
notice. No license is granted by implication or otherwise under any patent or patent rights of
Analog Devices. Trademarks and registered trademarks are the property of their respective
owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2011 Analog Devices, Inc. All rights reserved.
FEATURES
Main input voltage range: 2.3 V to 5.5 V
Two 1200 mA buck regulators and one 300 mA LDO
24-lead, 4 mm × 4 mm LFCSP package
Regulator accuracy: ±3%
Factory programmable or external adjustable VOUTx
3 MHz buck operation with forced PWM and auto
PWM/PSM modes
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V
LDO: output voltage range from 0.8 V to 4.75 V
LDO: low input supply voltage from 1.7 V to 5.5 V
LDO: high PSRR and low output noise
APPLICATIONS
Power for processors, ASICS, FPGAs, and RF chipsets
Portable instrumentation and medical devices
Space constrained devices
GENERAL DESCRIPTION
The ADP5024 combines two high performance buck
regulators and one low dropout (LDO) regulators in a small, 24-
lead 4 mm × 4 mm LFCSP (QFN) to meet demanding
performance and board space requirements.
The high switching frequency of the buck regulators enables tiny
multilayer external components and minimizes the board
space. When the MODE pin is set high, the buck regulators
operate in forced PWM mode. When the MODE pin is set
low, the buck regulators operate in PWM mode when the
load is around the nominal value. When the load current falls
below a predefined threshold, the regulator operates in power
save mode (PSM) improving the light-load efficiency.
The two bucks operate out of phase to reduce the input
capacitor requirement. The low quiescent current, low dropout
voltage, and wide input voltage range of the ADP5024 LDO
extends the battery life of portable devices. The ADP5024
LDO maintains power supply rejection greater than 60 dB for
frequencies as high as 10 kHz while operating with a low
headroom voltage.
Regulators in the ADP5024 are activated though dedicated
enable pins. The default output voltages can be externally set
in the adjustable version, or factory programmable in the
fixed voltage version, and can be set to a wide range of preset
values.
TYPICAL APPLICATION CIRCUIT
Figure 1.
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參數(shù)描述 |
|---|---|
| ADP5024ACPZ-2-R7 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| ADP5024ACPZ-R2 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 ADJ Outputs UVLO Low RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| ADP5024ACPZ-R7 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 ADJ Outputs UVLO Low RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| ADP5024CP-EVALZ | 功能描述:BOARD EVAL FOR ADP5024 LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - DC/DC 與 AC/DC（離線）SMPS 系列:* 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP50250001CBZR | 功能描述:IC RF REGULATOR LDO 制造商:analog devices inc. 系列:* 零件狀態(tài):上次購買時(shí)間 標(biāo)準(zhǔn)包裝:1 |
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