參數(shù)資料
型號: ADN2860ACPZ250-RL7
廠商: Analog Devices Inc
文件頁數(shù): 4/20頁
文件大?。?/td> 0K
描述: IC POT DGTL 3CH 250K 24-LFCSP
標(biāo)準(zhǔn)包裝: 1
接片: 128,512,512
電阻(歐姆): 250k
電路數(shù): 3
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V,±2.25 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ADN2860ACPZ250RDKR
ADN2860
Rev. B | Page 12 of 20
A random read operation is shown in Figure 21. This operation
changes the address counter to the specified memory address by
performing a dummy write and then performing a read
operation beginning at the new address counter location.
EEPROM Write Protection
Setting the WP pin to logic low protects the EEPROM memory
from future write operations. In this mode, EEPROM and
RDAC register readings operate normally.
RDAC I2C INTERFACE
DATA
SA
A
10
0
1
R
EE/
RD
A
4
A
3
A
2
A
1
A
0
AC
CMD/
REG
R
1
10
0
P
03615-022
0 WRITE
(N BYTES + ACKNOWLEDGE)
RDAC ADDRESS
RDAC SLAVE ADDRESS
A/A
Figure 22. RDAC Write
SA
A
11
0
1
R
A
RDAC EEPROM OR REGISTER DATA
R
1
10
0
P
03615-023
1 READ
(N BYTES + ACKNOWLEDGE)
RDAC SLAVE ADDRESS
A
Figure 23. RDAC Current Read
SLAVE ADDRESS
RDAC ADDRESS
S
0 WRITE
AA
P
03615-024
W
SLAVE ADDRESS
RDAC DATA
SR
1 READ
REPEATED START
A
(N BYTES + ACKNOWLEDGE)
A/A
Figure 24. RDAC Random Read
SA
A
10
0
1
R
C
1
C
2
C
3
C
0
A
2
A
1
A
0
CMD/
REG
R
1
10
0
P
03615-025
A
0 WRITE
1 CMD
RDAC SLAVE ADDRESS
Figure 25. RDAC Shortcut Commands
Table 5. RDAC Register Addresses (CMD/REG = 0, EE/RDAC = 0)
A4
A3
A2
A1
A0
RDAC
Byte Description
0
RDAC0
(D7)(D6)(D5)(D4)(D3)(D2)(D1)(D0)—RDAC0 8 LSBs
0
1
RDAC0
(X)(X)(X)(X)(X)(X)(X)(D8)—RDAC0 MSB
0
1
0
RDAC1
(D7)(D6)(D5)(D4)(D3)(D2)(D1)(D0)—RDAC1 8 LSBs
0
1
RDAC1
(X)(X)(X)(X)(X)(X)(X)(D8)—RDAC1 MSB
0
1
0
RDAC2
(X)(D6)(D5)(D4)(D3)(D2)(D1)(D0)—RDAC2 7 bits
0
1
0
1
Reserved
…to…
1
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