參數(shù)資料
型號： ADMC401BST
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號處理
英文描述： Single-Chip, DSP-Based High Performance Motor Controller
中文描述： 24-BIT, 13 MHz, OTHER DSP, PQFP144
封裝： PLASTIC, LQFP-144
文件頁數(shù)： 51/60頁
文件大?。?/td> 417K
代理商： ADMC401BST
ADMC401
–51–
REV. B
PIOLEVEL (R/W)
DM (0x2040)
0 = FALLING EDGE (PIOMODE = 0)
= ACTIVE LOW (PIOMODE = 1)
1 = RISING EDGE (PIOMODE = 0)
= ACTIVE HIGH (PIOMODE = 1)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
DM (0x2041)
0 = EDGE SENSITIVE
1 = LEVEL SENSITIVE
PIOMODE (R/W)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
DM (0x2042)
0 = PWM TRIP DISABLE
1 = PWM TRIP ENABLE
PIOPWM (R/W)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
1
1
1
1
1
1
1
1
1
1
1
DM (0x2044)
0 = INPUT
1 = OUTPUT
PIODIR (R/W)
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
PIOFLAG (R)
DM (0x2047)
0 = NO INTERRUPT
1 = INTERRUPT FLAGGED
DM (0x2046)
PIOINTEN (R/W)
0 = INTERRUPT DISABLE
1 = INTERRUPT ENABLE
DM (0x2045)
0 = LO LEVEL
1 = HI LEVEL
PIODATA (R/W)
8
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Figure 39. Structure of Registers of ADMC401
Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—
these bits should always be written as shown.
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