參數(shù)資料
型號(hào)： ADM6995
廠商： Electronic Theatre Controls, Inc.
英文描述： 5 PORT 10/100 MB/S SINGLE CHIP ETHIERNET SWITCH CONTROLLER
中文描述： 5端口10/100 Mb / s的單芯片ETHIERNET開(kāi)關(guān)控制器
文件頁(yè)數(shù)： 4/57頁(yè)
文件大小： 1815K
代理商： ADM6995
ADMtek Inc.
V1.0
3.9
3.10
3.11
3.12
3.13
3.14
3.15
3.15.1
3.15.2
3.15.3
3.15.4
3.15.5
3.15.6
3.15.7
3.15.8
3.15.9
3.16
3.17
3.18
3.19
3.20
Chapter 4 Register Description....................................................................................4-1
4.1
EEPROM Content............................................................................................4-1
4.2
EEPROM Register Map...................................................................................4-1
4.3
EEPROM Register...........................................................................................4-2
4.3.1
Signature Register, offset: 0x00h..............................................................4-2
4.3.2
Configuration Registers, offset: 0x01h ~ 0x09h......................................4-3
4.3.3
Reserved Register, offset: 0x0ah..............................................................4-3
4.3.4
Configuration Register, offset: 0x0bh......................................................4-4
4.3.5
Reserved Register, offset: 0x0ch~0x0dh..................................................4-4
4.3.6
VLAN priority Map Register, offset: 0x0eh.............................................4-4
4.3.7
TOS priority Map Register, offset: 0x0fh.................................................4-4
4.3.8
Packet with Priority: Normal packet content..........................................4-5
4.3.9
VLAN Packet............................................................................................4-5
4.3.10
TOS IP Packet..........................................................................................4-6
4.3.11
Miscellaneous Configuration Register, offset: 0x10h..............................4-6
4.3.12
VLAN mode select Register, offset: 0x11h...............................................4-7
4.3.13
Miscellaneous Configuration register, offset: 0x12h ..............................4-7
4.3.14
VLAN mapping table registers, offset: 0x22h ~ 0x13h............................4-8
4.3.15
Reserved Register, offset: 0x27h ~ 0x23h................................................4-8
4.3.16
Port0 PVID bit 11 ~ 4 Configuration Register, offset: 0x28h.................4-8
4.3.17
Port1 PVID bit 11 ~ 4 Configuration Register, offset: 0x29h.................4-8
4.3.18
Port2 PVID bit 11~4 Configuration Register, offset: 0x2ah...................4-9
4.3.19
Port3, 4 PVID bit 11~4 Configuration Register, offset: 0x2bh...............4-9
4.3.20
VLAN group shift bits Configuration Register, offset: 0x2ch..................4-9
4.3.21
Reserved Register, offset: 0x2dh..............................................................4-9
Link Test Function...........................................................................................3-8
Automatic Link Polarity Detection..............................................................3-8
Clock Synthesizer........................................................................................3-8
Auto Negotiation..........................................................................................3-8
Memory Block.............................................................................................3-9
Switch Functional Description.....................................................................3-9
Basic Operation............................................................................................3-9
Address Learning...................................................................................3-10
Address Recognition and Packet Forwarding.......................................3-10
Address Aging........................................................................................3-10
Back off Algorithm.................................................................................3-11
Inter-Packet Gap (IPG).........................................................................3-11
Illegal Frames........................................................................................3-11
Half Duplex Flow Control.....................................................................3-11
Full Duplex Flow Control......................................................................3-11
Broadcast Storm filter............................................................................3-11
Auto TP MDIX function................................................................................3-12
Port Locking...............................................................................................3-12
VLAN setting & Tag/Untag & port-base VLAN ......................................3-12
Priority Setting...........................................................................................3-13
LED Display..............................................................................................3-14
ADM6995L
ii
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADM6995L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5 PORT 10/100 MB/s SINGLE CHIP ETHERNET SWITCH CONTROLLER
ADM6995LAAT1 功能描述:IC SWITCH CNTRLR 10/100 128QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ADM6995LAAT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
ADM6995LCACT1 制造商:Infineon Technologies AG 功能描述:
ADM6995LCACT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
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