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參數(shù)資料
| 型號： | ADM6995 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 5 PORT 10/100 MB/S SINGLE CHIP ETHIERNET SWITCH CONTROLLER |
| 中文描述： | 5端口10/100 Mb / s的單芯片ETHIERNET開關(guān)控制器 |
| 文件頁數(shù)： | 17/57頁 |
| 文件大?。?/td> | 1815K |
| 代理商： | ADM6995 |
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ADM6995L
Function Description
Chapter 3 Function Description
3.1 Functional Descriptions
The ADM6995L integrates five 100Base-X physical sub-layer (PHY), 100Base-TX
physical medium dependent (PMD) transceivers, five complete 10Base-T modules and
memory into a single chip for both 10Mbits/s, 100Mbits/s Ethernet switch operation. It
also supports 100Base-FX operation through external fiber-optic transceivers. The device
is capable of operating in either Full Duplex mode or Half-Duplex mode in 10Mbits/s and
100Mbits/s. Operational modes can be selected by hardware configuration pins, software
settings of management registers, or determined by the on-chip auto negotiation logic.
The ADM6995L consists of three major blocks:
10/100M PHY Block
Switch Controller Block
Built-in SSRAM
3.2 10/100M PHY Block
The 100Base-X section of the device implements the following functional blocks:
100Base-X physical coding sub-layer (PCS)
100Base-X physical medium attachment (PMA)
Twisted-pair transceiver (PMD)
The 100Base-X and 10Base-T sections share the following functional blocks.
Clock synthesizer module
IEEE 802.3u auto negotiation
3.3 100Base-X Module
The ADM6995L implements 100Base-X compliant PCS and PMA and 100Base-TX
compliant TP-PMD as illustrated in Figure 2. Bypass options for each of the major
functional blocks within the 100Base-X PCS provides flexibility for various applications.
100Mbits/s PHY loop back is included for diagnostic purpose.
3.4 100Base-X Receiver
The 100Base-X receiver consists of functional blocks required to recover and condition
the 125Mbits/s receive data stream. The ADM6995L implements the 100Base-X
receiving state machine diagram as given in ANSI/IEEE Standard 802.3u, Clause 24. The
125Mbits/s receive data stream may originate from the on-chip twisted-pair transceiver in
a 100Base-TX application. Alternatively, the receive data stream may be generated by an
external optical receiver as in a 100Base-FX application.
The receiver block consists of the following functional sub-blocks :
ADMtek Inc.
3-1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADM6995L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5 PORT 10/100 MB/s SINGLE CHIP ETHERNET SWITCH CONTROLLER |
| ADM6995LAAT1 | 功能描述:IC SWITCH CNTRLR 10/100 128QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ADM6995LAAT1NP | 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY |
| ADM6995LCACT1 | 制造商:Infineon Technologies AG 功能描述: |
| ADM6995LCACT1NP | 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY |
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