參數(shù)資料
型號(hào)： ADM6995
廠商： Electronic Theatre Controls, Inc.
英文描述： 5 PORT 10/100 MB/S SINGLE CHIP ETHIERNET SWITCH CONTROLLER
中文描述： 5端口10/100 Mb / s的單芯片ETHIERNET開(kāi)關(guān)控制器
文件頁(yè)數(shù)： 22/57頁(yè)
文件大?。?/td> 1815K
代理商： ADM6995
ADM6995L
Function Description
3.5.2
Twisted-Pair Receiver
For 100Base-TX operation, the incoming signal is detected by the on-chip twisted-pair
receiver that consists of a differential line receiver, an adaptive equalizer and a base-line
wander compensation circuits.
The ADM6995L uses an adaptive equalizer that changes filter frequency response in
accordance with cable length. The cable length is estimated based on the incoming signal
strength. The equalizer tunes itself automatically for any cable length to compensate for
the amplitude and phase distortions incurred from the cable.
3.6 10Base-T Module
The 10Base-T Transceiver Module is IEEE 802.3 compliant. It includes the receiver,
transmitter, collision, heartbeat, loop back, jabber, wave shaper, and link integrity
functions, as defined in the standard. Figure 3 provides an overview for the 10Base-T
module.
The ADM6995L 10Base-T module is comprised of the following functional blocks:
Manchester encoder and decoder
Collision detector
Link test function
Transmit driver and receiver
Serial and parallel interface
Jabber and SQE test functions
Polarity detection and correction
3.6.1
Operation Modes
The ADM6995L 10Base-T module is capable of operating in either half-duplex mode or
full-duplex mode. In half-duplex mode, the ADM6995L functions as an IEEE 802.3
compliant transceiver with fully integrated filtering. The COL signal is asserted during
collisions or jabber events, and the CRS signal is asserted during transmit and receive. In
full duplex mode the ADM6995L can simultaneously transmit and receive data.
3.6.2
Manchester Encoder/Decoder
Data encoding and transmission begins when the transmission enable input (TXEN) goes
high and continues as long as the transceiver is in good link state. Transmission ends
when the transmission enable input goes low. The last transition occurs at the center of
the bit cell if the last bit is a 1, or at the boundary of the bit cell if the last bit is 0.
Decoding is accomplished by a differential input receiver circuit and a phase-locked loop
that separate the Manchester-encoded data stream into clock signals and NRZ data. The
decoder detects the end of a frame when no more mid bit transitions are detected. Within
one and half bit times after the last bit, carrier sense is de-asserted.
ADMtek Inc.
3-6
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADM6995L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5 PORT 10/100 MB/s SINGLE CHIP ETHERNET SWITCH CONTROLLER
ADM6995LAAT1 功能描述:IC SWITCH CNTRLR 10/100 128QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ADM6995LAAT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
ADM6995LCACT1 制造商:Infineon Technologies AG 功能描述:
ADM6995LCACT1NP 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY
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