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參數(shù)資料
| 型號： | ADM1069AST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP32 |
| 封裝： | MS-026-BBA, LQFP-32 |
| 文件頁數(shù)： | 34/36頁 |
| 文件大?。?/td> | 763K |
| 代理商： | ADM1069AST |
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ADM1069
Rev. A | Page 7 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
04735-003
1
24
25
32
8
9
17
16
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
GND
V
DDCAP
SD
A
SC
L
A1
A0
V
CCP
PD
OGN
D
AGND
RE
FGND
RE
FIN
RE
FOUT
DAC1
DAC2
DAC3
DAC4
PIN 1
INDICATOR
ADM1069
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 2. Pin Function Descriptions
Pin No.
Mnemonic
Description
1 to 4
VX1 to VX4 (VXn)
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to 1.375 V.
Alternatively, these pins can be used as general-purpose digital inputs.
5 to 7
VP1 to VP3 (VPn)
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply fault
detector. These pins allow thresholds from 2.5 V to 6.0 V, 1.25 V to 3.00 V, and 0.573 V to 1.375 V.
8
VH
High Voltage Input to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply fault
detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
9
AGND1
Ground Return for Input Attenuators.
10
Ground Return for On-Chip Reference Circuits.
11
REFIN
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage. The on-board
reference can be used by connecting the REFOUT pin to the REFIN pin. This is the normal configuration.
12
REFOUT
2.048 V Reference Output. A reservoir capacitor must be connected between this pin and GND. A 10 μF
capacitor is recommended for this purpose.
13 to 16
DAC1 to DAC4
Voltage Output DACs. These pins default to high impedance at power-up.
17 to 24
PDO8 to PDO1
Programmable Output Drivers.
25
PDOGND1
Ground Return for Output Drivers.
26
VCCP
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this pin and
GND. A 10 μF capacitor is recommended for this purpose.
27
A0
Logic Input. This pin sets the seventh bit of the SMBus interface address.
28
A1
Logic Input. This pin sets the sixth bit of the SMBus interface address.
29
SCL
SMBus Clock Pin. Open-drain output that requires external resistive pull-up.
30
SDA
SMBus Data I/O Pin. Open-drain output that requires external resistive pull-up.
31
VDDCAP
Device Supply Voltage. Linearly regulated from the highest of the VPn, VH pins to a typical of 4.75 V. Note that
a capacitor must be connected between this pin and GND. A 10 μF capacitor is recommended for this purpose.
32
Supply Ground.
1 In a typical application, all ground pins are connected together.
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