參數(shù)資料
型號(hào)： ADM1033ARQ-REEL
廠商： ON SEMICONDUCTOR
元件分類(lèi)： 溫度/濕度傳感器
英文描述： DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT
封裝： MO-137AB, QSOP-16
文件頁(yè)數(shù)： 17/39頁(yè)
文件大小： 819K
代理商： ADM1033ARQ-REEL
ADM1033
Rev. 0 | Page 24 of 40
Once the THERM limits are exceeded, the fans are boosted to
full speed—that is, as long as the boost disable bit (Bit 1) is not
set in Configuration Register 2 (Address 0x02).
To configure THERM as an input, set the THERM timer bit
(Bit 2) of Configuration Register 1 (Address 0x01) to 1. (It no
longer operates as an output.) The ADM1033 can then detect
whenever the THERM input is asserted low. This can be con-
nected to a trip point temperature sensor or to the PROCHOT
output of a CPU. With processor core voltages reducing all the
time, the threshold for the ADTL + PROCHOT output also
reduces as new processors become available. The default thresh-
old on THERM is the normal CMOS threshold. However, Pin 8
(FAN_FAULT/REF) can be reconfigured as a REF input. This
is done by setting Bit 7 (FAN_FAULT/REF) in Configuration
Register 4 (Address 0x04) to 1. The processor VCCP should be
connected to this input to provide a reference for the THERM
input. The resulting THERM threshold is 0.75 × VCCP, the
correct threshold for an AGTL+ signal.
The ADM1033 can also measure assertion times on the
THERM input as a percentage of an on-time window. This
window is programmable in Configuration Register 4
(Address 0x04) using Bits <6:4> (THERM % on-time window).
Values of between 0.25 and 8 are programmable. The assertion
time, as a percentage of the time window, is stored in the
THERM % on-time register (Address 0x4E).
A THERM % (0x19) limit is also associated with this register.
Once the measured percentage exceeds the percentage limit,
the THERM % exceeded bit (Bit 4) in Status Register 2
(Address 0x50) is asserted and an ALERT is generated, as long
as the mask bit is not set. If the limit is set to 0x00, an ALERT
is generated on the first assertion. If the limit is set to 0xFF, an
ALERT is never generated. This is because 0xFF corresponds to
the THERM input, which is asserted all the time.
Table 24. THERM % On-Time Window
Code
THERM % On-Time Window
000
0.25 s
001
0.5 s
010
1 s
011
2
100
4 s
101
8 s
110
8 s
111
8 s
When THERM is configured as an input only, set the enable
THERM events bits in Configuration Register 4 (Address 0x04)
to allow Pin 7 to operate as an I/O.
To configure the THERM pin to be pulled low as an output
whenever the local temperature exceeds the local THERM limit,
set the enable local THERM events bit (Bit 0) of Configuration
Register 4 (Address 0x04).
To configure the THERM pin to be pulled low as an output
whenever the remote temperature exceeds the remote THERM
limit, set the enable remote THERM events bit (Bit 1) of
Configuration Register 4 (Address 0x04).
THERM % LIMIT REGISTER
The THERM % limit is programmed to Register 0x19. An
ALERT is generated if the THERM is asserted for longer than
the programmed percentage limit. The limit is programmed as a
percentage of the chosen time window.
0x00 = 0%
0xFF = 100%
Therefore, 1 LSB = 0.39%
Example
If a time window of 8 seconds is chosen, and an ALERT is to be
generated if THERM is asserted for more than 1 second,
program the following value to the limit register:
% Limit = 1/8 × 100 = 12.5%
12.5% / 0.39% = 32d = 0x20 = 0010 0000
An ALERT is generated if the THERM limit is exceeded after
the time window has elapsed, assuming it is not masked.
Rev. 1 | Page 24 of 39 | www.onsemi.com
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