![](http://datasheet.mmic.net.cn/310000/ADF4108_datasheet_16240673/ADF4108_2.png)
ADF4108
TABLE OF CONTENTS
Features..............................................................................................1
Rev. 0 | Page 2 of 20
Applications.......................................................................................1
General Description.........................................................................1
Functional Block Diagram..............................................................1
Revision History...............................................................................2
Specifications.....................................................................................3
Timing Characteristics.....................................................................5
Absolute Maximum Rating.............................................................6
ESD Caution..................................................................................6
Pin Configuration and Function Descriptions.............................7
Typical Performance Characteristics.............................................8
Theory of Operation........................................................................9
Reference Input Stage...................................................................9
RF Input Stage...............................................................................9
Prescaler (P/P + 1)........................................................................9
A and B Counters.........................................................................9
R Counter......................................................................................9
Phase Frequency Detector and Charge Pump...........................9
MUXOUT and Lock Detect...................................................... 10
Input Shift Register.................................................................... 10
Latch Summary........................................................................... 11
Reference Counter Latch Map.................................................. 12
AB Counter Latch Map ............................................................. 13
Function Latch Map................................................................... 14
Initialization Latch Map............................................................ 15
Function Latch............................................................................ 16
Initialization Latch..................................................................... 17
Power Supply Considerations................................................... 17
Interfacing ....................................................................................... 18
ADuC812 Interface.................................................................... 18
ADSP-2181 Interface ................................................................. 18
PCB Design Guidelines for Chip Scale Package......................... 19
Outline Dimensions....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
4/06—Revision 0: Initial Version