參數(shù)資料
型號(hào): ADE7169ASTZF16
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述: SPECIALTY ANALOG CIRCUIT, QCC64
封裝: 9 X 9 MM, ROHS COMPLIANT, MO-22-VMMD-4, LFCSP-64
文件頁(yè)數(shù): 116/140頁(yè)
文件大?。?/td> 1359K
代理商: ADE7169ASTZF16
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ADE7169F16
Preliminary Technical Data
UART SERIAL INTERFACE
The ADE7169F16 UART can be configured in one of four
modes:
Rev. PrD | Page 116 of 140
- Shift register with baud rate fixed at F
core
/12
- 8-bit UART with variable baud rate
- 9- bit UART with baud rate fixed at F
core
/64 or F
core
/32
- 9 bit UART with variable baud rate
Variable baud rates are defined by using an internal timer to
generate any rate between 300 and 115200 bauds/s.
The UART serial interface provided in the ADE7169F16 is a
full-duplex serial interface. It is also receive buffered, by storing
the first received byte in a receive buffer until the reception of
UART SFR REGISTER LIST
Table 115. Serial port SFRs
SFR
Address
Bit Addressable
the second byte is complete. The physical interface to the UART
is provided via the RxD (P1.0) and TxD (P1.1) pins, while the
firmware interface is through the SFRs presented in Table 115.
Both the serial port receive and transmit registers are accessed
through the SBUF SFR (SFR address = 0x99). Writing to SBUF
loads the transmit register, and reading SBUF accesses a
physically separate receive register.
An enhanced UART mode is offered by using UART Timer and
providing enhanced frame error, break error and overwrite
error detection. This mode is enabled by setting the EXTEN bit
in the CFG SFR—see the UART additional features section. The
SBAUDT and SBAUDF SFR are used to configure UART Timer
and to indicate the enhanced UART errors.
Description
SCON
0x98
Yes
Serial Communications Control register – see Table 116
SBUF
0x99
No
Serial Port Buffer – see Table 117
SBAUDT
0x9E
No
Enhanced error checking
– see Table 118
SBAUDF
Table 116. SCON SFR Bit Description SFR (SCON, 0x98)
Bit
Location
Addr.
Name
0x9D
No
Enhanced Fractional Divider
– see Table 119
Bit
Bit
Default
Value
Description
UART Serial Mode Select Bits. These bits select the serial port operating mode as
follows:
SM0
SM1
Selected Operating Mode.
0
0
Mode 0: Shift register, fixed baud rate (F
core
/12).
0
1
Mode 1: 8-bit UART, variable baud rate.
1
0
Mode 2: 9-bit UART, fixed baud rate (F
core
/32) or (F
core
/16).
7-6
0x9F,
0x9E
SM0,
SM1
00
1
1
Mode 3: 9-bit UART, variable baud rate.
5
0x9D
SM2
0
Multiprocessor Communication Enable Bit.
Enables multiprocessor communication in Modes 2 and 3 and framing error detection
in Mode 1.
In Mode 0, SM2 should be cleared.
In Mode 1, if SM2 is set, RI is not activated if a valid stop bit was not received. If SM2 is
cleared, RI is set as soon as the byte of data is received.
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