參數(shù)資料
型號: ADC1413S065HN
廠商: NXP Semiconductors N.V.
元件分類: 外設及接口
英文描述: Single 14 bits ADC; 65 Msps; serial JESD204A
封裝: ADC1413S065HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/SOT1152-1.html<1<Always Pb-free,;ADC1413S065HN/C1<SOT1152-1 (HVQFN32R)|<<http://www.nxp.com/packages/S
文件頁數(shù): 31/38頁
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代理商: ADC1413S065HN
ADC1413S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 8 June 2011
31 of 38
NXP Semiconductors
ADC1413S series
Single 14-bit ADC: serial JESD204A interface
Table 41.
Default values are highlighted.
Bit
Symbol
7 to 1
-
0
S
Cfg_9_S (address 0828h)
Access
-
R/W
Value
0000000
0
Description
not used
defines number of samples per converter per frame cycle
Table 42.
Default values are highlighted.
Bit
Symbol
7
HD
6 to 2
-
1 to 0
CF[1:0]
Cfg_10_HD_CF (address 0829h)
Access
R/W
-
R/W
Value
*
00000
00
Description
defines high density format
not used
defines number of control words per frame clock cycle per link.
Table 43.
Default values are highlighted.
Bit
Symbol
7 to 5
-
4 to 0
LID[4:0]
Cfg02_2_LID (address 082Dh)
Access
-
R/W
Value
000
11100
Description
not used
defines lane identification number
Table 44.
Default values are highlighted.
Bit
Symbol
7 to 0
FCHK[7:0]
Cfg01_13_FCHK (address 084Dh)
Access
R
Value
********
Description
defines the checksum value for lane
checksum corresponds to the sum of all the link configuration
parameters module 256 (as defined in JEDEC Standard
No.204A)
Table 45.
Default values are highlighted.
Bit
Symbol
7
-
6
SCR_IN_MODE
Lane_0_Ctrl (address 0871h)
Access
-
R/W
Value
0
Description
not used
defines the input type for scrambler and 8-bit/10-bit units:
(normal mode) = Input of the scrambler and 8-bit/10-bit
units is the output of the frame assembly unit.
input of the scrambler and 8-bit/10-bit units is the PRSB
generator (PRBS type is defined with “PRBS_TYPE[1:0]”
(Ser_PRBS_ctrl register)
defines output type of Lane output unit:
normal mode: Lane output is the 8-bit/10-bit output unit
constant mode: Lane output is set to a constant (0
0)
toggle mode: Lane output is toggling between 0
0 and 0
1
PRBS mode: Lane output is the PRBS generator (PRBS type is
defined with “PRBS_TYPE[1:0]” (Ser_PRBS_ctrl register)
not used
0
(reset)
1
5 to 4
LANE_MODE[1:0]
R/W
00
(reset)
01
10
11
3
-
-
0
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相關代理商/技術參數(shù)
參數(shù)描述
ADC1413S065HN/C1,5 功能描述:模數(shù)轉換器 - ADC SGL 14b ADC 65MSPS SERIAL JESD204A RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1413S065HN-C1 制造商:Integrated Device Technology Inc 功能描述:HVQFN32 - Bulk
ADC1413S065HN-C18 制造商:Integrated Device Technology Inc 功能描述:HVQFN32 - Tape and Reel
ADC1413S080HN/C1,5 功能描述:模數(shù)轉換器 - ADC SGL 14b ADC 80MSPS SERIAL JESD204A RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32