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| 型號： | ADC1112D125HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Dual 11-bit ADC; CMOS or LVDS DDR digital outputs |
| 封裝： | ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,;ADC1112D125HN/C1<SOT804-3|<<<1<Always Pb-free,; |
| 文件頁數(shù)： | 25/41頁 |
| 文件大?。?/td> | 565K |
| 代理商： | ADC1112D125HN |
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ADC1112D125
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 3 March 2011
25 of 41
NXP Semiconductors
ADC1112D125
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
The output resistance is 50
Ω
and is the combination of an internal resistor and the
equivalent output resistance of the buffer. There is no need for an external damping
resistor. The drive strength of both DATA and DAV buffers can be programmed via the SPI
in order to adjust the rise and fall times of the output digital signals (see
Table 31
).
11.5.2
Digital output buffers: LVDS DDR mode
The digital output buffers can be configured as LVDS DDR by setting bit LVDS_CMOS to
logic 1 (see
Table 24
).
Each output should be terminated externally with a 100
Ω
resistor (typical) at the receiver
side (
Figure 30
) or internally via SPI control bits LVDS_INT_TER[2:0]
(see
Figure 31
and
Table 33
).
The default LVDS DDR output buffer current is set to 3.5 mA. It can be programmed via
the SPI (bits DAVI[1:0] and DATAI[1:0]; see
Table 32
) in order to adjust the output logic
voltage levels.
Fig 30. LVDS DDR digital output buffer - externally terminated
Fig 31. LVDS DDR digital output buffer - internally terminated
DAn_DAn + 1_M; DBn_DBn + 1_M
VDDO
3.5 mA
typical
AGND
100 Ω
-
005aaa112
+
-
+
RECEIVER
DAn_DAn + 1_P; DBn_DBn + 1_P
DAn_DAn + 1_P; DBn_DBn + 1_P
DAn_DAn + 1_M; DBn_DBn + 1_M
VDDO
3.5 mA
typical
AGND
100 Ω
-
005aaa113
+
-
+
RECEIVER
100 Ω
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1112D125HN/C1,5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2IN 125MSPS 66.2dB RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1112D125HN/C1+551 | 制造商:NXP Semiconductors 功能描述:Bulk 制造商:NXP Semiconductors 功能描述:0 |
| ADC1112D125HN-C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC1112D125HN-C18 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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