參數(shù)資料
型號: ADAU1461WBCPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 69/88頁
文件大?。?/td> 0K
描述: IC SIGMADSP 24BIT 96KHZ PLL 32
標(biāo)準(zhǔn)包裝: 1,500
系列: SigmaDSP®
類型: 音頻處理器
應(yīng)用: 車載音頻
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ
包裝: 帶卷 (TR)
ADAU1461
Rev. 0 | Page 71 of 88
R33: Playback Mono Output Control, 16,423 (0x4027)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MONOVOL[5:0]
MONOM
MOMODE
Table 65. Playback Mono Output Control Register
Bits
Bit Name
Description
[7:2]
MONOVOL[5:0]
Mono output volume control. Each 1-bit step corresponds to a 1 dB increase in volume. If MX7[1:0] in Register R28
is set for common-mode output, volume control is disabled. See Table 93 for a complete list of the volume settings.
Setting
Volume
000000
57 dB (default)
111001
0 dB
111111
6 dB
1
MONOM
Mono output mute (active low).
0 = mute.
1 = unmute (default).
0
MOMODE
Headphone mode enable. If MX7[1:0] in Register R28 is set for common-mode output for a capless headphone
configuration, this bit should be set to 1 ( headphone output).
0 = line output (default).
1 = headphone output.
R34: Playback Pop/Click Suppression, 16,424 (0x4028)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
POPMODE
POPLESS
ASLEW[1:0]
Reserved
Table 66. Playback Pop/Click Suppression Register
Bits
Bit Name
Description
4
POPMODE
Pop suppression circuit power saving mode. The pop suppression circuits charge faster in normal operation;
however, after they are charged, they can be put into low power operation.
0 = normal (default).
1 = low power.
3
POPLESS
Pop suppression disable. The pop suppression circuits are enabled by default. They can be disabled to save
power; however, disabling the circuits increases the risk of pops and clicks.
0 = enabled (default).
1 = disabled.
[2:1]
ASLEW[1:0]
Analog volume slew rate for playback volume controls.
Setting
Slew Rate
00
21.25 ms (default)
01
42.5 ms
10
85 ms
11
Off
R35: Playback Power Management, 16,425 (0x4029)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
PREN
PLEN
Table 67. Playback Power Management Register
Bits
Bit Name
Description
1
PREN
Playback right channel enable.
0 = disabled (default).
1 = enabled.
0
PLEN
Playback left channel enable.
0 = disabled (default).
1 = enabled.
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