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參數(shù)資料
| 型號： | ADATE207BBP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Quad Pin Timing Formatter |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA256 |
| 封裝： | MO-192-BAL-2, LBGA-256 |
| 文件頁數(shù)： | 26/36頁 |
| 文件大?。?/td> | 374K |
| 代理商： | ADATE207BBP |
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ADATE207
Name:
Address:
Type:
Rev. 0 | Page 26 of 36
Waveform D1 Vernier Delay and Action
0x08
Read/Write
Table 22. Waveform D1 Vernier Delay and Action
Position
Description
Bits[15:10]
D1 Vernier Delay. The vernier delay is represented in binary by the equation, vvvvvv × (2.5 ns/64).
Bits[09:04]
Not Used.
Bits[03:00]
D1 Action. A binary encoded data field.
0x0 = no action.
0x1 = drive low.
0x2 = drive high.
0x3 = force off.
0x4 = force on.
0x5 = force down.
0x6 = force up.
0x7 = edge compare low.
0x8 = edge compare high.
0x9 = edge compare off.
0xA = edge compare valid.
0xF = close window/compare unknown.
Reset State
Undefined
0x00
Undefined
Name:
Address:
Type:
Waveform D1Course Delay
0x09
Read/Write
Table 23. Waveform D1 Course Delay
Position
Description
Bits[15:00]
D1 Course Delay. Number of 2.5 ns clock periods to count.
When this count is completed, add the vernier delay (defined by the D1 vernier value programmed
into the waveform D1 vernier delay and action register) to the D1 course delay to place an edge in
time.
Waveform D1 vernier delay and action must be written immediately before this register for the
waveform memory to be correctly written.
Reset State
Undefined
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