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參數資料
| 型號： | ADA4941-1YRZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 8/25頁 |
| 文件大小： | 0K |
| 描述： | IC DIFF ADC DRIVER 18BIT 8SOIC |
| 設計資源： | Converting a Single-Ended Signal with AD7982 Differential PulSAR ADC (CN0032) Converting a Single-Ended Signal with AD7984 Differential PulSAR ADC (CN0033) |
| 標準包裝： | 1,000 |
| 類型： | ADC 驅動器 |
| 應用： | 數據采集 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
ADA4941-1
Rev. C | Page 15 of 24
THEORY OF OPERATION
The ADA4941-1 is a low power, single-ended input, differential
output amplifier optimized for driving high resolution ADCs.
Figure 47 illustrates how the ADA4941-1 is typically connected.
The amplifier is composed of an uncommitted amplifier, A1,
driving a precision inverter, A2. The negative input of A1 is
brought out to Pin 1 (FB), allowing for user-programmable
gain. The inverting op amp, A2, provides accurate inversion of
the output of A1, VOP, producing the output signal VON.
1k
1k
RG
RF
RF || RG
500
A2
A1
REF
IN
VREF
2
8
4
5
FB
OUT+
+
–
VOP
1
OUT–
+
–
VON
VIN
VG
05704-
052
Figure 47. Basic Connections (Power Supplies Not Shown)
The voltage applied to the REF pin appears as the output
common-mode voltage. Note that the voltage applied to the
REF pin does not affect the voltage at the OUT+ pin. Because of
this, a differential offset can exist between the outputs, while the
desired output common-mode voltage is present. For example,
when VOP = 3.5 V and VON = 1.5 V, the output common-
mode voltage is equal to 2.5 V, just as it is when both outputs
are at 2.5 V. In the first case, the differential voltage (or offset) is
2.0 V, and in the latter case, the differential voltage is 0 V. When
calculating output voltages, both differential and common-mode
voltages must be considered at the same time to avoid undesired
differential offsets.
BASIC OPERATION
VG and VREF are externally applied voltages. VO, cm is defined
as the output common-mode voltage and VO, dm is defined as
the differential-mode output voltage. The following equations
can be derived from Figure 47:
+
=
G
F
G
F
R
VG
R
VIN
VOP
1
(1)
)
(
2
1
VREF
R
VG
R
VIN
VON
G
F
G
F
+
+
+
=
(2)
)
(
2
1
)
(
2
,
VREF
R
VG
R
VIN
VON
VOP
dm
V
G
F
G
F
O
+
=
=
(3)
VREF
VON
VOP
cm
VO
=
+
=
2
,
(4)
When RF = 0 and RG is removed, Equation 3 simplifies to the
following:
VO, dm = 2(VIN) 2(VREF)
(5)
1k
1k
4.99k
1k
825
500
A2
A1
REF
IN
2
8
4
5
FB
+5V
–5V
VS+
VS–
OUT+
+
–
VOP
1
3
6
OUT–
+
–
VON
VIN
05704-
053
Figure 48. Dual Supply, G = 2.4, Single-Ended-to-Differential Amplifier
Figure 48 shows an example of a dual-supply connection. In this
example, VG and VREF are set to 0 V, and the external RF and
RG network provides a noninverting gain of 1.2 in A1. This
example takes full advantage of the rail-to-rail output stage.
The gain equation is
VOP VON = 2.4(VIN)
(6)
The in-series, 825 resistor combined with Pin 8 compensates
for the voltage error generated by the input offset current of A1.
The linear output range of both A1 and A2 extends to within
200 mV of each supply rail, which allows a peak-to-peak
differential output voltage of 19.2 V on ±5 V supplies.
1k
1k
500
A2
A1
REF
IN
2
8
4
5
FB
+5V
VS+
VS–
OUT+
+
–
VOP
1
3
6
OUT–
+
–
VON
+2.5V
VIN
05704-
054
Figure 49. Single +5V Supply, G=2 Single-Ended-to-Differential Amplifier
Figure 49 shows a single 5 V supply connection with A1 used as
a unity gain follower. The 2.5 V at the REF pin sets the output
common-mode voltage to 2.5 V. The transfer function is then
VOP VON = 2(VIN) 5 V
(7)
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| ADA4941-1YRZ-RL | 功能描述:IC DIFF ADC DRIVER 18BIT 8SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
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