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參數(shù)資料
| 型號(hào)： | AD9995 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing ⑩ Generator |
| 中文描述： | 12位CCD信號(hào)處理器與精密計(jì)時(shí)⑩發(fā)生器 |
| 文件頁(yè)數(shù)： | 52/60頁(yè) |
| 文件大?。?/td> | 1593K |
| 代理商： | AD9995 |
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AD9995
–52–
Table XLII. V-Sequence 5 (VSEQ5) Register Map
Data Bit Default
Address Content
A8
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Name
HBLKMASK_5
CLPOBPOL_5
PBLKPOL_5
VPATSEL_5
VMASK_5
HBLKALT_5
UNUSED
VPATREPO_5
VPATREPE_5
VPATSTART_5
HDLEN_5
PBLKTOG1_5
PBLKTOG2_5
HBLKTOG1_5
HBLKTOG2_5
HBLKTOG3_5
HBLKTOG4_5
HBLKTOG5_5
HBLKTOG6_5
CLPOBTOG1_5
CLPOBTOG2_5
Description
Masking Polarity during HBLK. H1 [0]. H3 [1].
CLPOB Start Polarity
PBLK Start Polarity
Selected V-Pattern Group for V-Sequence 5
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
Enable HBLK Alternation
Unused
Number of Selected V-Pattern Group Repetitions for Odd Lines
Number of Selected V-Pattern Group Repetitions for Even Lines
Start Position in the Line for the Selected V-Pattern Group
HD Line Length (Number of Pixels) for V-Sequence 5
PBLK Toggle Position 1 for V-Sequence 5
PBLK Toggle Position 2 for V-Sequence 5
HBLK Toggle Position 1 for V-Sequence 5
HBLK Toggle Position 2 for V-Sequence 5
HBLK Toggle Position 3 for V-Sequence 5
HBLK Toggle Position 4 for V-Sequence 5
HBLK Toggle Position 5 for V-Sequence 5
HBLK Toggle Position 6 for V-Sequence 5
CLPOB Toggle Position 1 for V-Sequence 5
CLPOB Toggle Position 2 for V-Sequence 5
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
A9
AA
AB
AC
AD
AE
AF
Table XLIII. V-Sequence 6 (VSEQ6) Register Map
Data Bit Default
Address Content
B0
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Name
HBLKMASK_6
CLPOBPOL_6
PBLKPOL_6
VPATSEL_6
VMASK_6
HBLKALT_6
UNUSED
VPATREPO_6
VPATREPE_6
VPATSTART_6
HDLEN_6
PBLKTOG1_6
PBLKTOG2_6
HBLKTOG1_6
HBLKTOG2_6
HBLKTOG3_6
HBLKTOG4_6
HBLKTOG5_6
HBLKTOG6_6
CLPOBTOG1_6
CLPOBTOG2_6
Description
Masking Polarity during HBLK. H1 [0]. H3 [1].
CLPOB StartPolarity
PBLK Start Polarity
Selected V-Pattern Group for V-Sequence 6
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
Enable HBLK Alternation
Unused
Number of Selected V-Pattern Group Repetitions for Odd Lines
Number of Selected V-Pattern Group Repetitions for Even Lines
Start Position in the Line for the Selected V-Pattern Group
HD Line Length (Number of Pixels) for V-Sequence 6
PBLK Toggle Position 1 for V-Sequence 6
PBLK Toggle Position 2 for V-Sequence 6
HBLK Toggle Position 1 for V-Sequence 6
HBLK Toggle Position 2 for V-Sequence 6
HBLK Toggle Position 3 for V-Sequence 6
HBLK Toggle Position 4 for V-Sequence 6
HBLK Toggle Position 5 for V-Sequence 6
HBLK Toggle Position 6 for V-Sequence 6
CLPOB Toggle Position 1 for V-Sequence 6
CLPOB Toggle Position 2 for V-Sequence 6
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
B1
B2
B3
B4
B5
B6
B7
REV. 0
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